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目录
1.产品概述 2.产品特点 3.应用范围 4.技术规格书下载（PDF文档）
The JTFM8PE68B is a family of low-cost, high speed, OTP-based 8-bit CMOS microcontrollers. It employs a RISC
architecture with only 49 instructions. All instructions are single cycle except for program branches which take two
cycles. The easy to use and easy to remember instruction set reduces development time significantly.
The JTFM8PE68B consists of Power-on Reset (POR), Brown-out Reset (BOR), Power-up Reset Timer (PWRT),
Oscillator Start-up Timer(OST), Watchdog Timer, Data RAM, OTP/ROM, SRAM, LCD driver, IROUT function,
tristate I/O port, I/O pull-high/open-drain/pull-down control, Power saving SLEEP mode, real time programmable
clock/counter, Interrupt, Wake-up from SLEEP mode, RFC, and Code Protection for OTP products. There are
three oscillator configurations to choose from, including the power-saving LP (Low Power) oscillator and cost saving
RC oscillator.
The JTFM8PE68B address 4K of program memory.
The JTFM8PE68B can directly or indirectly address its register files and data memory. All special function registers
including the program counter are mapped in the data memory.
Only 49 single word instructions.
4K Word on chip OTP.
All OTP area GOTO/FGOTO instruction.
All OTP area subroutine CALL/FCALL instruction.
Totally 272 x 8 bits on chip general purpose registers (SRAM):
- 144 bytes general purpose register.
- 128 bytes on-chip data RAM.
8-level deep hardware stack.
Direct, indirect addressing modes for data accessing.
One 8-bit real time clock/counter (Timer0) with 8-bit programmable pre-scaler.
Four sets of 8-bit auto reload counter/timer can be used as IROUT/PWM generator or interrupt sources:
- Counter 1: independent counter.
- Counter 2: High Pulse Width Timer, and Low Pulse Width Timer shared with IR function.
One IROUT/PWM generator.
LCD driver with 4(common) x 32(segment) pixels; 1/3, 1/2 bias and 1/4, 1/3, 1/2 duty selection.
3 channels of 15-bit resolution Resistor to Frequency Converter (RFC) output.
Internal Power-on Reset (POR).
Built-in Low Voltage Detector (LVD) for Brown-out Reset (BOR).
Power-up Reset Timer (PWRT) and Oscillator Start-up Timer(OST).
On chip Watchdog Timer (WDT) with internal oscillator and soft-ware watch-dog enable/disable control.
Four I/O ports PORTA, PORTB, PORTC and PORTD with independent direction control.
Two output only ports PORTE and PORTF.
Soft-ware I/O pull-high/pull-down or open-drain control.
Seven internal interrupt source: Timer0, Counter1, Counter2, High-pulse width timer, Low-pulse width timer, RFC
and Fs divider; Three external interrupt source: INT0 pin, INT1 pin and Port B / Port D input status change.
Wake-up from SLEEP/IDLE by Port B/Port D input change.
Operation modes:
- Normal mode: CPU operate on high frequency main-oscillator.
- Green mode: CPU operate on low frequency sub-oscillator.
- Idle mode: CPU idle, LCD display remains working.
- Sleep mode: whole chip stop working.
Dual clock Operation: main-oscillator and sub-oscillator.
Selectable main-oscillator options:
- ERIC: External Resistor/Internal Capacitor Oscillator.
- XT: Crystal/Resonator Oscillator.
- LF: Low Frequency Crystal/Resonator Oscillator.
- PLL: Phase lock loop.
Selectable sub-oscillator options:
- ERIC: External Resistor/Internal Capacitor Oscillator.
- LF: Low Frequency Crystal Oscillator.
Wide-operating voltage range:
- OTP: 2.3V to 5.5V.
JTFM8PE68BA/BB: 64-pin OTP device
JTFM8PE68BC: 44-pin OTP device
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| EEPROM/FLASH | |||||||||||||||
| Product Name | ROM | RAM | I/O | Ext. Interrupt | Int. | Wake up | Stack | Timer | PWM / | ADC | Data EEPROM | Interface | IRC | Package | Status |
| (Word) | (Byte) | Interrupt | IROUT | ||||||||||||
| FM8PE32F | 2K | 128 | 12 | 5 | 6 | Yes | 8 | 8bit*2 | IROUT | No | 256*8 | No | Yes | DIP/SOP/SSOP14 | MP |
| (FLASH) | 16bit*1 | 10bitPWM*1 | QFN16 | ||||||||||||
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