CXSD61051 synchronous step down regulator CC control from a high voltage input supply 3.5A continuou

目录PSv嘉泰姆

1.产品概述                       2.产品特点PSv嘉泰姆
3.应用范围                       4.产品封装图PSv嘉泰姆
5.电路原理图                   6.产品PCB                   PSv嘉泰姆
7.产品BOM                      8.产品PDF文档 PSv嘉泰姆
9.功能概述                      10.相关产品PSv嘉泰姆

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一,产品概述(General Description)   PSv嘉泰姆

        The CXSD61051 is a synchronous step down regulator with CC control from a high voltage input supply. Operating with an input voltagePSv嘉泰姆
range of 8V ～ 30V, the CXSD61051 achieves 3.5A continuous output current with excellent load and line regulation. The switching  frequency is programmable from 100KHz to 500KHz and the synchronous architecturePSv嘉泰姆
provides for highly efficient designs. Current  mode operation provides fast transient response and eases loop stabilization.PSv嘉泰姆

         The CXSD61051 requires a minimum number of readily available standard external components. Other features include cable compensation programmable current limit and thermal shutdown.PSv嘉泰姆

        The CXSD61051 converters are available in the industry standard SOP8-PP packages       PSv嘉泰姆

二.产品特点(Features)PSv嘉泰姆

Wide Input Voltage Range: 8V ～ 30VPSv嘉泰姆

Up to 93% EfficiencyPSv嘉泰姆

Programmable Switching Frequency up to 500KHzPSv嘉泰姆

No Loop Compensation RequiredPSv嘉泰姆

CC/CV controlPSv嘉泰姆

Programmable CC CurrentPSv嘉泰姆

Thermal ShutdownPSv嘉泰姆

Available in SOP8-PP PackagePSv嘉泰姆

三,应用范围 (Applications) PSv嘉泰姆

Car Charger / AdaptorPSv嘉泰姆

LED DriverPSv嘉泰姆

Pre-Regulator for Linear RegulatorsPSv嘉泰姆

Distributed Power SystemsPSv嘉泰姆

Battery ChargerCar Charger / AdaptorPSv嘉泰姆

LED DriverPSv嘉泰姆

Pre-Regulator for Linear RegulatorsPSv嘉泰姆

Distributed Power SystemsPSv嘉泰姆

Battery ChargerPSv嘉泰姆

四,产品封装图 (Package)PSv嘉泰姆
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五,电路原理图PSv嘉泰姆

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六, 产品PCBPSv嘉泰姆
(略)PSv嘉泰姆
七.产品BOM  PSv嘉泰姆
  (略)PSv嘉泰姆
八.产品PDF文档 PSv嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！PSv嘉泰姆

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九,功能概述PSv嘉泰姆

Application Information PSv嘉泰姆
The CXSD61051 operates by a constant frequency, current mode architecture. The output voltage is setPSv嘉泰姆
by an external divider returned to the FB pin. An error amplifier compares the divided output voltage withPSv嘉泰姆
a reference voltage of 1.21V and adjusts the peak inductor current accordingly. PSv嘉泰姆
Thermal ProtectionPSv嘉泰姆
The total power dissipation in CXSD61051 is limited by a thermal protection circuit. When the devicePSv嘉泰姆
temperature rises to approximately +160°C, this circuit turns off the output, allowing the IC to cool. ThePSv嘉泰姆
thermal protection circuit can protect the device from being damaged by overheating in the event of faultPSv嘉泰姆
conditions. Continuously running the CXSD61051 into thermal shutdown degrades device reliability. PSv嘉泰姆
Current LimitPSv嘉泰姆
Current limit detection occurs during the off-time by monitoring the current through the low-side switchPSv嘉泰姆
using an external resistor, RLIM. The current limit value is defined by RLIM. If during the off-time thePSv嘉泰姆
current in the low-side switch exceeds the user defined current limit value, the next on-time cycle isPSv嘉泰姆
immediately terminated. Current sensing is achieved by comparing the voltage across the low side FETPSv嘉泰姆
with the voltage across the current limit set resistor RLIM. For example, the current limit value is 4.5A byPSv嘉泰姆
the RLIM =100K. The current limit value rises when the set resistor RLIM rises. The maximum outputPSv嘉泰姆
current is set by RLIM: RLIM (kΩ) = 1500 · IMAX (A) / RDS_PMOS (mΩ). PSv嘉泰姆
Oscillator FrequencyPSv嘉泰姆
The CXSD61051 oscillator frequency is set by a single external resistor connected between the RT pin andPSv嘉泰姆
the GND pin. The resistor should be located very close to the device and connected directly to the pinsPSv嘉泰姆
of the IC (RT and GND). An internal amplifier holds the RT pin at a fixed voltage typically 0.6V. ThePSv嘉泰姆
oscillator frequency rises when the resistor RT falls. To determine the timing resistance for a givenPSv嘉泰姆
switching frequency, use the equation below:PSv嘉泰姆
RT(kΩ)= 22000 /fOSC(kHz) PSv嘉泰姆
Setting Output VoltagePSv嘉泰姆
The output voltage is set with a resistor divider from the output node to the FB pin. It is recommended toPSv嘉泰姆
use divider resistors with 1% tolerance or better. To improve efficiency at very light loads consider usingPSv嘉泰姆
larger value resistors. If the values are too high the regulator is more susceptible to noise and voltagePSv嘉泰姆
errors from the FB input current are noticeable. For most applications, a resistor in the 10kΩ to 1MΩPSv嘉泰姆
range is suggested for R3. R2 is then given by:PSv嘉泰姆
R2 = R3 · [(VOUT / VREF) – 1]PSv嘉泰姆
where VREF is 1.21V.PSv嘉泰姆
Output Cable Resistance CompensationPSv嘉泰姆
To compensate for resistive voltage drop across the charger's output cable, the CXSD61051 integrates aPSv嘉泰姆
simple, user-programmable cable voltage drop compensation using the impedance at the FB pin.PSv嘉泰姆
Choose the proper feedback resistance values for cable compensation refer to the curve in Figure 1.PSv嘉泰姆
The delta VOUT voltage rises when the feedback resistance R3 value rises, use the equation belowPSv嘉泰姆
十,相关产品              更多同类产品......PSv嘉泰姆