CXSD6280两个同步降压型脉宽调制控制器高精度内部参考电压的线性控制器PWM控制器同步buck拓扑中的两个N沟道mosfet

发布时间:2020-04-21 16:27:33 浏览次数:316 作者:oumao18 来源:嘉泰姆
摘要:CXSD6280PWM控制器设计用于驱动同步buck拓扑中的两个N沟道mosfet,以及控制器驱动外部N沟道MOSFET。设备要求12V和5V电源,如果5V电源不可用,VCC12可以为5V电源提供可选的5.8V并联调节器。所有输出都有通过SS/EN引脚控制独立软启动和启用功能。将每个SS/EN引脚的电容器接地,以设置软启动时间,将SS/EN引脚拉到1V以下以禁用调节器
CXSD6280两个同步降压型脉宽调制控制器高精度内部参考电压的线性控制器PWM控制器同步buck拓扑中的两个N沟道mosfet

目录7i3嘉泰姆

1.产品概述                       2.产品特点7i3嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 7i3嘉泰姆
5.产品封装图                     6.电路原理图                   7i3嘉泰姆
7.功能概述                        8.相关产品7i3嘉泰姆

一,产品概述(General Description)         7i3嘉泰姆


          The CXSD6280 has two synchronous buck PWM control-lers7i3嘉泰姆
and one linear controller with high precision internal references voltage7i3嘉泰姆
to offer accurate outputs. The PWM controllers are designed to drive7i3嘉泰姆
two N-channel MOSFETs in synchronous buck topology, and the linear7i3嘉泰姆
controller drives an external N-channel MOSFET. The device re-quires7i3嘉泰姆
12V and 5V power supplies, if the 5V supply is not available, VCC12 can7i3嘉泰姆
offer an optional shunt regulator 5.8V for 5V supply.All outputs have7i3嘉泰姆
independent soft-start and enable func-tions by SS/EN pins to control.7i3嘉泰姆
Connect a capacitor from each SS/EN pin to the ground for setting the7i3嘉泰姆
soft-start time, and pulling the SS/EN pin below 1V to disable regulator.7i3嘉泰姆
Pull the SS2/EN2 to VCC, enter the DDR mode,the SS1/EN1 controls7i3嘉泰姆
both VOUT1 and VOUT2, and al-lows VOUT2 to track VOUT1. It also7i3嘉泰姆
offers the phase shift function by REFOUT pin to select the phase shift7i3嘉泰姆
between VOUT1 and VOUT2 in DDR mode or Independent mode.7i3嘉泰姆
When all SS/EN pins exceed 3.3V and no faults are detected, the PGOOD7i3嘉泰姆
pin goes high to indicate the regu-lators are ready. If any of the SS/EN pins7i3嘉泰姆
goes below 3.2V or any of the outputs has a fault condition, the PGOOD pin7i3嘉泰姆
will be pulled low.7i3嘉泰姆
     The internal oscillator is nominally 300kHz (keep the FS/SYNC pin open7i3嘉泰姆
or short to GND), and it offers the pro-grammable frequency function from7i3嘉泰姆
70kHz to 800kHz; con-necting a resistor from FS/SYNC to VCC12 to decrease7i3嘉泰姆
the frequency, conversely, connect a resistor from FS/SYNC to GND to7i3嘉泰姆
increase the frequency.The IC also pro-vides the synchronous frequency7i3嘉泰姆
function. Connect the LGATE signal of another converter to FS/SYNC pin;7i3嘉泰姆
forc-ing the switching frequency to follow the external clock.
         The possible synchronous frequency is from 150kHz to 800kHz. There7i3嘉泰姆
is no Rds(on) sensing or under-voltage sens-ing on CXSD6280. However, it7i3嘉泰姆
provides a simple short-circuit protection by monitoring the COMP1 and COMP27i3嘉泰姆
for over-voltage. When any of two pins exceeds their trip point and the condition7i3嘉泰姆
persists for 1-2 internal clock cycle (3-6μs at 300kHz), then it will shut down7i3嘉泰姆
all regulators.7i3嘉泰姆
二.产品特点(Features)7i3嘉泰姆


1.)Two Synchronous Buck Converters and A Linear Regulator7i3嘉泰姆
2.)VIN Range up to 12V7i3嘉泰姆
3.)Input Power Supplies Require 12V and 5V or7i3嘉泰姆
4.)Use 12V to Generate a Shunt Regulator 5.8V7i3嘉泰姆
5.)0.6V Reference for VOUT1 and VOUT3 with 0.8% Accurate7i3嘉泰姆
6.)3.3V Reference for VOUT2 with 0.8% Accurate7i3嘉泰姆
7.)Buffered VTT Reference Output7i3嘉泰姆
8.)Three Outputs have Independent Soft-Start and Enable7i3嘉泰姆
9.)Internal 300kHz Oscillator and Programmable7i3嘉泰姆
10.)Frequency Range from 70 kHz to 800kHz7i3嘉泰姆
11.)Synchronous Switching Frequency7i3嘉泰姆
12.)DDR Mode or Independent Mode Selection7i3嘉泰姆
13.)Phase Shift Selection7i3嘉泰姆
14.)Power Good Function7i3嘉泰姆

15.)Short-Circuit Protection for VOUT1 and VOUT27i3嘉泰姆
16.)Thermally Enhanced TSSOP-24P and QFN5x5-32 Packages7i3嘉泰姆
17.)Lead Free and Green Devices Available (RoHS Compliant) 7i3嘉泰姆
三,应用范围 (Applications)7i3嘉泰姆


Graphic Cards7i3嘉泰姆
DDR memory Power Supplies7i3嘉泰姆
Low-Voltage Distributed Power Supplies7i3嘉泰姆
四.下载产品资料PDF文档 7i3嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持7i3嘉泰姆

 QQ截图20160419174301.jpg7i3嘉泰姆

五,产品封装图 (Package)7i3嘉泰姆


7i3嘉泰姆
FUNCTIONNAMEFUNCTION7i3嘉泰姆
These pins are the outputs of error amplifiers of their respective regulators. They are7i3嘉泰姆
used to set the compensation components.7i3嘉泰姆
These pins provide two functions. Connect a capacitor to the GND for setting the7i3嘉泰姆
soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable the7i3嘉泰姆
respective output, leave open to enable the respective output.7i3嘉泰姆
These pins provide two functions. Connect a capacitor to the GND for setting the7i3嘉泰姆
soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable the7i3嘉泰姆
respective output, leave open to enable the respective output.7i3嘉泰姆

PIN7i3嘉泰姆

FUNCTION7i3嘉泰姆

NO.7i3嘉泰姆

NAME7i3嘉泰姆

TSSOP-24P7i3嘉泰姆

DFN5x5-327i3嘉泰姆

       

17i3嘉泰姆

297i3嘉泰姆

FB17i3嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.7i3嘉泰姆

27i3嘉泰姆

307i3嘉泰姆

COMP17i3嘉泰姆

These pins are the outputs of error amplifiers of their respective regulators. They are used to set the compensation components.7i3嘉泰姆

37i3嘉泰姆

317i3嘉泰姆

COMP27i3嘉泰姆

47i3嘉泰姆

327i3嘉泰姆

FB27i3嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.7i3嘉泰姆

57i3嘉泰姆

17i3嘉泰姆

REFIN7i3嘉泰姆

This pin is the reference input voltage of error amplifier of the VOUT2. It also provides the voltage into a buffer, which is out on the REFOUT pin.7i3嘉泰姆

67i3嘉泰姆

37i3嘉泰姆

REFOUT7i3嘉泰姆

This pin provides a buffed voltage, which is from REFIN pin. In Independent mode, it can be used by other ICs. In DDR mode, it is from the VOUT1, and can be used as the VTT buffer. This pin also uses to select the phase shift (see table1). When this pin7i3嘉泰姆
pulls to VCC, the buffer is disabled and the REFOUT is not available for use. It is recommended that a 0.1μF capacitor is connected to the ground for stability.7i3嘉泰姆

77i3嘉泰姆

47i3嘉泰姆

SS1/EN17i3嘉泰姆

These pins provide two functions. Connect a capacitor to the GND for setting the soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable the respective output, leave open to enable the respective output.7i3嘉泰姆

87i3嘉泰姆

57i3嘉泰姆

SS2/EN27i3嘉泰姆

97i3嘉泰姆

67i3嘉泰姆

SS3/EN37i3嘉泰姆

107i3嘉泰姆

77i3嘉泰姆

VREF7i3嘉泰姆

This pin provides a 3.3V reference voltage, which can be used by the REFIN pin or other ICs as a voltage reference. It is recommended that a 1μF capacitor is connected to ground for stability7i3嘉泰姆

117i3嘉泰姆

87i3嘉泰姆

DRIVE37i3嘉泰姆

This pin drives the gate of an external N-channel MOSFET for linear regulator.7i3嘉泰姆

127i3嘉泰姆

107i3嘉泰姆

FB37i3嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.7i3嘉泰姆

137i3嘉泰姆

117i3嘉泰姆

FS/SYNC7i3嘉泰姆

This pin is used to adjust the switching frequency. Connecting a resistor from FS/SYNC pin to the ground increases the switching frequency. Conversely,connecting a resistor from this pin to the VCC12 reduces the switching frequency. In addition, this pin also provides synchronous frequency function. An external clock can be fed into this pin, and force the switching frequency to follow the external clock.7i3嘉泰姆

147i3嘉泰姆

127i3嘉泰姆

PGOOD7i3嘉泰姆

This pin is an open drain device; connect a pull up resistor to the VCC for PGOOD function.7i3嘉泰姆

157i3嘉泰姆

137i3嘉泰姆

GND7i3嘉泰姆

This pin is the signal ground pin. The metal thermal pad under the package is the IC substrate; connects the GND pin and metal thermal pad together on the board, and ties to the good GND plane for electrical and thermal conduction.7i3嘉泰姆

167i3嘉泰姆

167i3嘉泰姆

BOOT27i3嘉泰姆

These pins provide the bootstrap voltage to the gate driver for driving the upper MOSFETs. It can be connected to a power voltage directly, but the difference voltage between the BOOT and VIN must be high enough to drive the upper MOSFETs.7i3嘉泰姆

177i3嘉泰姆

147i3嘉泰姆

UGATE27i3嘉泰姆

These pins provide the gate driver for the upper MOSFETs of VOUT1 and VOUT2.7i3嘉泰姆

187i3嘉泰姆

18,237i3嘉泰姆

PGND7i3嘉泰姆

This pin is the power ground pin for the gate driver and linear driver circuit. It should be tied to the GND.7i3嘉泰姆

197i3嘉泰姆

207i3嘉泰姆

LGATE27i3嘉泰姆

These pins provide the gate driver for the lower MOSFETs of VOUT1 and VOUT2.7i3嘉泰姆

207i3嘉泰姆

217i3嘉泰姆

LGATE17i3嘉泰姆

These pins provide the gate driver for the lower MOSFETs of VOUT1 and VOUT2.7i3嘉泰姆

217i3嘉泰姆

19, 227i3嘉泰姆

VCC127i3嘉泰姆

Power supply input pin. Connect a nominal 12V power supply to this pin for the gate driver. It is recommended that a decoupling capacitor (1 to 10μF) is connected to the GND for noise decoupling.7i3嘉泰姆

六.电路原理图7i3嘉泰姆


blob.png7i3嘉泰姆

七,功能概述7i3嘉泰姆


Soft-Start/Enable7i3嘉泰姆
The three SS/EN pins control the soft-start and enable or disable the controller. In Independent mode, the three7i3嘉泰姆
regulators all have independent soft-start and enable functions. Connect a soft-start capacitor from each SS/EN7i3嘉泰姆
pin to the GND to set the soft-start interval, and an open drain logic signal for each SS/EN pin will enable or dis-7i3嘉泰姆
able the respective output.7i3嘉泰姆

八,相关产品            更多同类产品......  7i3嘉泰姆


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Voltage7i3嘉泰姆

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1   7i3嘉泰姆

1     7i3嘉泰姆

307i3嘉泰姆

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