CXSD62108单相恒定时间同步的脉宽调制控制器驱动N通道mosfet笔记本电脑中产生低压芯片组RAM电源的电压

发布时间:2020-04-23 14:31:47 浏览次数:299 作者:oumao18 来源:嘉泰姆
摘要:CXSD62108配备了精确的正电流限制、输出欠压和输出过电压保护,非常适合NB应用。 上电复位功能监控VCC和PVCC上的电压防止上电时误操作。CXSD62108具有1.2ms数字 软启动和内置的集成输出放电装置软停止。一个内部集成软启动可编程增加输出电压 降低启动电流的回转率。主动软停止功能放电输出电容器
CXSD62108单相恒定时间同步的脉宽调制控制器驱动N通道mosfet笔记本电脑中产生低压芯片组RAM电源的电压

目录ces嘉泰姆

1.产品概述                       2.产品特点ces嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 ces嘉泰姆
5.产品封装图                     6.电路原理图                   ces嘉泰姆
7.功能概述                        8.相关产品ces嘉泰姆

一,产品概述(General Description)         ces嘉泰姆
      The CXSD62108 is a single-phase, constant-on-time,synchronous PWMces嘉泰姆
controller, which drives N-channel MOSFETs. The CXSD62108 steps down highces嘉泰姆
voltage to generate low-voltage chipset or RAM supplies in notebook computers.ces嘉泰姆
      The CXSD62108 provides excellent transient response and accurate DCces嘉泰姆
voltage output in either PFM or PWM Mode.In Pulse Frequency Mode (PFM),ces嘉泰姆
the CXSD62108 provides very high efficiency over light to heavy loads with ces嘉泰姆

loading-modulated switching frequencies. In PWM Mode, the converter worksces嘉泰姆

nearly at constant frequency for low-noise requirements.ces嘉泰姆
    The CXSD62108 is equipped with accurate positive current-limit, outputces嘉泰姆
under-voltage, and output over-voltage protections, perfect for NB applications.ces嘉泰姆
The Power-On-Reset function monitors the voltage on VCC and PVCC toces嘉泰姆
prevent wrong operation during power-on. The CXSD62108 has a 1.2ms digitalces嘉泰姆
soft-start and built-in an integrated output discharge device for soft-stop. An ces嘉泰姆

internal integrated soft-start ramps up the output voltage with programmable ces嘉泰姆

slew rate to reduce the start-up current. A soft-stop function actively ces嘉泰姆

discharges the output capacitors.ces嘉泰姆
       The CXSD62108 is available in 14pin TSSOP, 14pin QFN and 16pin TQFNces嘉泰姆
packages respectively.ces嘉泰姆
二.产品特点(Features)ces嘉泰姆
Adjustable Output Voltage from +0.75V to +5.5Vces嘉泰姆
- 0.75V Reference Voltageces嘉泰姆
- ±1% Accuracy Over-Temperatureces嘉泰姆
Operates from An Input Battery Voltage Range ofces嘉泰姆
+1.8V to +28Vces嘉泰姆
Power-On-Reset Monitoring on VCC Pin and PVCC Pinces嘉泰姆
Excellent Line and Load Transient Responsesces嘉泰姆
PFM Mode for Increased Light Load Efficiencyces嘉泰姆
Programmable PWM Frequency from 100kHz to 500kHzces嘉泰姆
Integrated MOSFET Driversces嘉泰姆
Integrated Bootstrap Forward P-CH MOSFETces嘉泰姆
Adjustable Integrated Soft-Start and Soft-Stopces嘉泰姆
Selectable Forced PWM or Automatic PFM/PWM Modeces嘉泰姆
Power Good Monitoringces嘉泰姆
70% Under-Voltage Protectionces嘉泰姆
125% Over-Voltage Protectionces嘉泰姆
Adjustable Current-Limit Protectionces嘉泰姆
- Using Sense Low-Side MOSFET’s RDS(ON)ces嘉泰姆
Over-Temperature Protectionces嘉泰姆
TSSOP-14, QFN3.5x3.5-14, and TQFN3x3-16 Packagesces嘉泰姆
Lead Free and Green Devices Available (RoHS Compliant)ces嘉泰姆
三,应用范围 (Applications)ces嘉泰姆
Notebookces嘉泰姆
Table PCces嘉泰姆
Hand-Held Portableces嘉泰姆
AIO PCces嘉泰姆
四.下载产品资料PDF文档 ces嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持ces嘉泰姆

 QQ截图20160419174301.jpgces嘉泰姆

五,产品封装图 (Package)ces嘉泰姆

blob.pngces嘉泰姆

六.电路原理图ces嘉泰姆


blob.pngces嘉泰姆
七,功能概述ces嘉泰姆


Layout Consideration (Cont.)ces嘉泰姆
· The signals going through theses traces have both high dv/dt and high di/dt with high peak charging and dis-ces嘉泰姆
charging current. The traces from the gate drivers to the MOSFETs (UGATE and LGATE) should be short and wide.ces嘉泰姆
· Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Minimiz-ces嘉泰姆
ing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node. Inces嘉泰姆
addition, the large layout plane between the drain of the MOSFETs (VIN and PHASE nodes) can get better heatces嘉泰姆
sinking.ces嘉泰姆
· The PGND is the current sensing circuit reference ground and also the power ground of the LGATE low-ces嘉泰姆
side MOSFET. On the hand, the PGND trace should be a separate trace and independently go to the source of theces嘉泰姆
low-side MOSFET. Besides, the current sense resistor should be close to OCSET pin to avoid parasitic capaci-ces嘉泰姆
tor effect and noise coupling.ces嘉泰姆
· Decoupling capacitors, the resistor-divider, and boot capacitor should be close to their pins. (For example, placeces嘉泰姆
the decoupling ceramic capacitor close to the drain of the high-side MOSFET as close as possible.)ces嘉泰姆
· The input bulk capacitors should be close to the drain of the high-side MOSFET, and the output bulk capacitorsces嘉泰姆
should be close to the loads. The input capacitor’s ground should be close to the grounds of the output capacitorsces嘉泰姆
and low-side MOSFET.ces嘉泰姆
· Locate the resistor-divider close to the FB pin to mini-mize the high impedance trace. In addition, FB pin tracesces嘉泰姆
can’t be close to the switching signal traces (UGATE, LGATE, BOOT, and PHASE).ces嘉泰姆
八,相关产品                      更多同类产品...... ces嘉泰姆


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