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2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
发表时间:2020-06-08浏览次数:175
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
 

目录LRz嘉泰姆

1.产品概述                       2.产品特点LRz嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 LRz嘉泰姆
5.产品封装图                     6.电路原理图                   LRz嘉泰姆
7.功能概述                        8.相关产品LRz嘉泰姆

一,产品概述(General Description)         LRz嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.LRz嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.LRz嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withLRz嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewLRz嘉泰姆
rate. All inputs and outputs are rail-to-rail.LRz嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).LRz嘉泰姆
二.产品特点(Features)LRz嘉泰姆


· 2.6V to 6.5V Input Supply Range LRz嘉泰姆

· Current-Mode Step-Up Regulator LRz嘉泰姆

 - Fast Transient Response LRz嘉泰姆

 - 1.2MHz Fixed Operating Frequency LRz嘉泰姆

· ±1.5% High-Accuracy Output Voltage LRz嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET LRz嘉泰姆

· High Efficiency LRz嘉泰姆

· Low Quiescent Current (0.6mA Typical) LRz嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF LRz嘉泰姆

· High-performance Operational Amplifiers LRz嘉泰姆

 - ±150mA Output Short-Circuit CurrentLRz嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth LRz嘉泰姆

 - Rail-to-Rail Inputs/Outputs LRz嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs LRz嘉泰姆

· Over-Temperature Protection LRz嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) LRz嘉泰姆

· Lead Free Available (RoHS Compliant)LRz嘉泰姆

三,应用范围 (Applications)LRz嘉泰姆


    TFT LCD Displays for MonitorsLRz嘉泰姆
   TFT LCD Displays for Notebook ComputersLRz嘉泰姆
   Automotive DisplaysLRz嘉泰姆
四.下载产品资料PDF文档 LRz嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持LRz嘉泰姆

 QQ截图20160419174301.jpgLRz嘉泰姆

五,产品封装图 (Package)LRz嘉泰姆


blob.pngLRz嘉泰姆
blob.pngPin Function DescriptionLRz嘉泰姆

PinLRz嘉泰姆

NameLRz嘉泰姆

Function DescriptionLRz嘉泰姆

CXSU63137LRz嘉泰姆

CXSU63137-1LRz嘉泰姆

CXSU63137-2LRz嘉泰姆

1LRz嘉泰姆

SRCLRz嘉泰姆

SRCLRz嘉泰姆

SRCLRz嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassLRz嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.LRz嘉泰姆

2LRz嘉泰姆

REFLRz嘉泰姆

REFLRz嘉泰姆

REFLRz嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofLRz嘉泰姆
0.22μFcapacitor closed to the pins.LRz嘉泰姆

3LRz嘉泰姆

AGNDLRz嘉泰姆

AGNDLRz嘉泰姆

AGNDLRz嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect toLRz嘉泰姆
power ground (PGND) underneath the IC.LRz嘉泰姆

4LRz嘉泰姆

PGNDLRz嘉泰姆

PGNDLRz嘉泰姆

PGNDLRz嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upLRz嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputLRz嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundLRz嘉泰姆
(AGND) underneath the IC.LRz嘉泰姆

5LRz嘉泰姆

OUT1LRz嘉泰姆

OUT1LRz嘉泰姆

OUT1LRz嘉泰姆

Output of Operational-Amplifier 1LRz嘉泰姆

6LRz嘉泰姆

NEG1LRz嘉泰姆

NEG1LRz嘉泰姆

NEG1LRz嘉泰姆

Inverting Input of Operational-Amplifier 1LRz嘉泰姆

7LRz嘉泰姆

POS1LRz嘉泰姆

POS1LRz嘉泰姆

POS1LRz嘉泰姆

Non-inverting Input of Operational-Amplifier 1LRz嘉泰姆

8LRz嘉泰姆

NCLRz嘉泰姆

OUT2LRz嘉泰姆

OUT2LRz嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalLRz嘉泰姆
connected of CXSU63137.LRz嘉泰姆

9LRz嘉泰姆

NCLRz嘉泰姆

NEG2LRz嘉泰姆

NEG2LRz嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalLRz嘉泰姆
connected of CXSU63137.LRz嘉泰姆

10LRz嘉泰姆

ICLRz嘉泰姆

POS2LRz嘉泰姆

POS2LRz嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternalLRz嘉泰姆
connected to GND of CXSU63137LRz嘉泰姆

11LRz嘉泰姆

BGNDLRz嘉泰姆

BGNDLRz嘉泰姆

BGNDLRz嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)LRz嘉泰姆
underneath the IC.LRz嘉泰姆

12LRz嘉泰姆

NCLRz嘉泰姆

NCLRz嘉泰姆

POS3LRz嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internalLRz嘉泰姆
connected of CXSU63137/CXSU63137.LRz嘉泰姆

13LRz嘉泰姆

NCLRz嘉泰姆

NCLRz嘉泰姆

OUT3LRz嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.LRz嘉泰姆

14LRz嘉泰姆

SUPLRz嘉泰姆

SUPLRz嘉泰姆

SUPLRz嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassLRz嘉泰姆
SUP to BGND with a 0.1μF capacitor.LRz嘉泰姆

15LRz嘉泰姆

NCLRz嘉泰姆

POS3LRz嘉泰姆

POS4LRz嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingLRz嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.LRz嘉泰姆

16LRz嘉泰姆

NCLRz嘉泰姆

NEG3LRz嘉泰姆

NEG4LRz嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofLRz嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.LRz嘉泰姆

17LRz嘉泰姆

NCLRz嘉泰姆

OUT3LRz嘉泰姆

OUT4LRz嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofLRz嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.LRz嘉泰姆

18LRz嘉泰姆

ICLRz嘉泰姆

ICLRz嘉泰姆

POS5LRz嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedLRz嘉泰姆
to GND of CXSU63137/CXSU63137.LRz嘉泰姆

19LRz嘉泰姆

NCLRz嘉泰姆

NCLRz嘉泰姆

NEG5LRz嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedLRz嘉泰姆
of CXSU63137/CXSU63137.LRz嘉泰姆

20LRz嘉泰姆

NCLRz嘉泰姆

NCLRz嘉泰姆

OUT5LRz嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.LRz嘉泰姆

21LRz嘉泰姆

LXLRz嘉泰姆

LXLRz嘉泰姆

LXLRz嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductorLRz嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.LRz嘉泰姆

22LRz嘉泰姆

INLRz嘉泰姆

INLRz嘉泰姆

INLRz嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangeLRz嘉泰姆
from 2.6V to 6.5V.LRz嘉泰姆

23LRz嘉泰姆

FBLRz嘉泰姆

FBLRz嘉泰姆

FBLRz嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromLRz嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinLRz嘉泰姆
5mm of FB.LRz嘉泰姆

24LRz嘉泰姆

COMPLRz嘉泰姆

COMPLRz嘉泰姆

COMPLRz嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCLRz嘉泰姆
from COMP to AGND.LRz嘉泰姆

PinFunction DescriptionLRz嘉泰姆

PinLRz嘉泰姆

NameLRz嘉泰姆

Function DescriptionLRz嘉泰姆

CXSU63137LRz嘉泰姆

CXSU63137-1LRz嘉泰姆

CXSU63137-2LRz嘉泰姆

24LRz嘉泰姆

COMPLRz嘉泰姆

COMPLRz嘉泰姆

COMPLRz嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCLRz嘉泰姆
from COMP to AGND.LRz嘉泰姆

25LRz嘉泰姆

FBPLRz嘉泰姆

FBPLRz嘉泰姆

FBPLRz嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of aLRz嘉泰姆
resistive voltage-divider between the regulator output and AGND to set theLRz嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-dividerLRz嘉泰姆
close to the pin.LRz嘉泰姆

26LRz嘉泰姆

DRVPLRz嘉泰姆

DRVPLRz嘉泰姆

DRVPLRz嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channelLRz嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.LRz嘉泰姆

27LRz嘉泰姆

FBNLRz嘉泰姆

FBNLRz嘉泰姆

FBNLRz嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of aLRz嘉泰姆
resistive voltage-divider between the regulator output and REF to set theLRz嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-dividerLRz嘉泰姆
close to the pin.LRz嘉泰姆

28LRz嘉泰姆

DRVNLRz嘉泰姆

DRVNLRz嘉泰姆

DRVNLRz嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channelLRz嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.LRz嘉泰姆

29LRz嘉泰姆

DELLRz嘉泰姆

DELLRz嘉泰姆

DELLRz嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND toLRz嘉泰姆
set the high-voltage switch startup delay.LRz嘉泰姆

30LRz嘉泰姆

CTLLRz嘉泰姆

CTLLRz嘉泰姆

CTLLRz嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchLRz嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andLRz嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCLRz嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isLRz嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thanLRz嘉泰姆
1.25V.LRz嘉泰姆

31LRz嘉泰姆

DRNLRz嘉泰姆

DRNLRz嘉泰姆

DRNLRz嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channelLRz嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedLRz嘉泰姆
VSRC.LRz嘉泰姆

32LRz嘉泰姆

COMLRz嘉泰姆

COMLRz嘉泰姆

COMLRz嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow theLRz嘉泰姆
voltage on COM to exceed VSRC.LRz嘉泰姆

六.电路原理图LRz嘉泰姆
七,功能概述LRz嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:LRz嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.LRz嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.LRz嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.LRz嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.LRz嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.LRz嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.LRz嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upLRz嘉泰姆
八,相关产品LRz嘉泰姆

Switching Regulator > Boost ConverterLRz嘉泰姆

 Part_No LRz嘉泰姆

PackageLRz嘉泰姆

Archi-tecture LRz嘉泰姆

Input LRz嘉泰姆

Voltage    LRz嘉泰姆

Max Adj.LRz嘉泰姆

Output LRz嘉泰姆

Voltage LRz嘉泰姆

Switch Current Limit (max) LRz嘉泰姆

Fixed LRz嘉泰姆

Output LRz嘉泰姆

Voltage  LRz嘉泰姆

Switching LRz嘉泰姆

Frequency LRz嘉泰姆

Internal Power   Switch LRz嘉泰姆

Sync. Rectifier LRz嘉泰姆

 

minLRz嘉泰姆

maxLRz嘉泰姆

minLRz嘉泰姆

maxLRz嘉泰姆

(A)LRz嘉泰姆

(V)LRz嘉泰姆

(kHz)LRz嘉泰姆

 

CXSU63133LRz嘉泰姆

SOT89LRz嘉泰姆

VM LRz嘉泰姆

0.9LRz嘉泰姆

5.5LRz嘉泰姆

2.5LRz嘉泰姆

5.5LRz嘉泰姆

0.5LRz嘉泰姆

1.8|2.6|2.8|3LRz嘉泰姆

|3.3|3.8|4.5|5LRz嘉泰姆

-LRz嘉泰姆

NoLRz嘉泰姆

YesLRz嘉泰姆

CXSU63134LRz嘉泰姆

MSOP8|TSSOP8LRz嘉泰姆

|SOP8LRz嘉泰姆

VMLRz嘉泰姆

2.5LRz嘉泰姆

5.5LRz嘉泰姆

2.5LRz嘉泰姆

-LRz嘉泰姆

-LRz嘉泰姆

-LRz嘉泰姆

200 ~ 1000LRz嘉泰姆

NoLRz嘉泰姆

NoLRz嘉泰姆

CXSU63135LRz嘉泰姆

TSSOP8|SOP-8PLRz嘉泰姆

VMLRz嘉泰姆

1LRz嘉泰姆

5.5LRz嘉泰姆

2.5LRz嘉泰姆

5LRz嘉泰姆

1LRz嘉泰姆

2.5|3.3LRz嘉泰姆

300LRz嘉泰姆

YesLRz嘉泰姆

YesLRz嘉泰姆

CXSU63136LRz嘉泰姆

SOP8LRz嘉泰姆

CMLRz嘉泰姆

3LRz嘉泰姆

40LRz嘉泰姆

1.25LRz嘉泰姆

40LRz嘉泰姆

1.5LRz嘉泰姆

-LRz嘉泰姆

33 ~ 100LRz嘉泰姆

YesLRz嘉泰姆

NoLRz嘉泰姆

CXSU63137LRz嘉泰姆

TQFN5x5-32LRz嘉泰姆

CMLRz嘉泰姆

2.5LRz嘉泰姆

6.5LRz嘉泰姆

2.5LRz嘉泰姆

18LRz嘉泰姆

3LRz嘉泰姆

NoLRz嘉泰姆

1200LRz嘉泰姆

YesLRz嘉泰姆

NoLRz嘉泰姆

CXSU63138LRz嘉泰姆

TSOT23-5LRz嘉泰姆

TDFN2x2-6LRz嘉泰姆

CMLRz嘉泰姆

2.5LRz嘉泰姆

6LRz嘉泰姆

2.5LRz嘉泰姆

20LRz嘉泰姆

2LRz嘉泰姆

-LRz嘉泰姆

1500LRz嘉泰姆

YesLRz嘉泰姆

NoLRz嘉泰姆

CXSU63139LRz嘉泰姆

TQFN4x4-6LRz嘉泰姆

TDFN3x3-12LRz嘉泰姆

CMLRz嘉泰姆

1.8LRz嘉泰姆

5.5LRz嘉泰姆

2.7LRz嘉泰姆

5.5LRz嘉泰姆

5LRz嘉泰姆

-LRz嘉泰姆

1.2LRz嘉泰姆

YesLRz嘉泰姆

YesLRz嘉泰姆

CXSU63140LRz嘉泰姆

SOT23-5LRz嘉泰姆

CMLRz嘉泰姆

2.5LRz嘉泰姆

6LRz嘉泰姆

2.5LRz嘉泰姆

32LRz嘉泰姆

1LRz嘉泰姆

-LRz嘉泰姆

1000LRz嘉泰姆

YesLRz嘉泰姆

NoLRz嘉泰姆

CXSU63141LRz嘉泰姆

TSOT-23-6 LRz嘉泰姆

TDFN2x2-8LRz嘉泰姆

CMLRz嘉泰姆

1.2LRz嘉泰姆

5.5LRz嘉泰姆

1.8LRz嘉泰姆

5.5LRz嘉泰姆

1.2LRz嘉泰姆

-LRz嘉泰姆

1.2LRz嘉泰姆

YesLRz嘉泰姆

YesLRz嘉泰姆

 LRz嘉泰姆

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