产品信息查询
产品 新闻
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
发表时间:2020-06-08浏览次数:64
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
 

目录D4h嘉泰姆

1.产品概述                       2.产品特点D4h嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 D4h嘉泰姆
5.产品封装图                     6.电路原理图                   D4h嘉泰姆
7.功能概述                        8.相关产品D4h嘉泰姆

一,产品概述(General Description)         D4h嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.D4h嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.D4h嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withD4h嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewD4h嘉泰姆
rate. All inputs and outputs are rail-to-rail.D4h嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).D4h嘉泰姆
二.产品特点(Features)D4h嘉泰姆


· 2.6V to 6.5V Input Supply Range D4h嘉泰姆

· Current-Mode Step-Up Regulator D4h嘉泰姆

 - Fast Transient Response D4h嘉泰姆

 - 1.2MHz Fixed Operating Frequency D4h嘉泰姆

· ±1.5% High-Accuracy Output Voltage D4h嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET D4h嘉泰姆

· High Efficiency D4h嘉泰姆

· Low Quiescent Current (0.6mA Typical) D4h嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF D4h嘉泰姆

· High-performance Operational Amplifiers D4h嘉泰姆

 - ±150mA Output Short-Circuit CurrentD4h嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth D4h嘉泰姆

 - Rail-to-Rail Inputs/Outputs D4h嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs D4h嘉泰姆

· Over-Temperature Protection D4h嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) D4h嘉泰姆

· Lead Free Available (RoHS Compliant)D4h嘉泰姆

三,应用范围 (Applications)D4h嘉泰姆


    TFT LCD Displays for MonitorsD4h嘉泰姆
   TFT LCD Displays for Notebook ComputersD4h嘉泰姆
   Automotive DisplaysD4h嘉泰姆
四.下载产品资料PDF文档 D4h嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持D4h嘉泰姆

 QQ截图20160419174301.jpgD4h嘉泰姆

五,产品封装图 (Package)D4h嘉泰姆


blob.pngD4h嘉泰姆
blob.pngPin Function DescriptionD4h嘉泰姆

PinD4h嘉泰姆

NameD4h嘉泰姆

Function DescriptionD4h嘉泰姆

CXSU63137D4h嘉泰姆

CXSU63137-1D4h嘉泰姆

CXSU63137-2D4h嘉泰姆

1D4h嘉泰姆

SRCD4h嘉泰姆

SRCD4h嘉泰姆

SRCD4h嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassD4h嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.D4h嘉泰姆

2D4h嘉泰姆

REFD4h嘉泰姆

REFD4h嘉泰姆

REFD4h嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofD4h嘉泰姆
0.22μFcapacitor closed to the pins.D4h嘉泰姆

3D4h嘉泰姆

AGNDD4h嘉泰姆

AGNDD4h嘉泰姆

AGNDD4h嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect toD4h嘉泰姆
power ground (PGND) underneath the IC.D4h嘉泰姆

4D4h嘉泰姆

PGNDD4h嘉泰姆

PGNDD4h嘉泰姆

PGNDD4h嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upD4h嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputD4h嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundD4h嘉泰姆
(AGND) underneath the IC.D4h嘉泰姆

5D4h嘉泰姆

OUT1D4h嘉泰姆

OUT1D4h嘉泰姆

OUT1D4h嘉泰姆

Output of Operational-Amplifier 1D4h嘉泰姆

6D4h嘉泰姆

NEG1D4h嘉泰姆

NEG1D4h嘉泰姆

NEG1D4h嘉泰姆

Inverting Input of Operational-Amplifier 1D4h嘉泰姆

7D4h嘉泰姆

POS1D4h嘉泰姆

POS1D4h嘉泰姆

POS1D4h嘉泰姆

Non-inverting Input of Operational-Amplifier 1D4h嘉泰姆

8D4h嘉泰姆

NCD4h嘉泰姆

OUT2D4h嘉泰姆

OUT2D4h嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalD4h嘉泰姆
connected of CXSU63137.D4h嘉泰姆

9D4h嘉泰姆

NCD4h嘉泰姆

NEG2D4h嘉泰姆

NEG2D4h嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalD4h嘉泰姆
connected of CXSU63137.D4h嘉泰姆

10D4h嘉泰姆

ICD4h嘉泰姆

POS2D4h嘉泰姆

POS2D4h嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternalD4h嘉泰姆
connected to GND of CXSU63137D4h嘉泰姆

11D4h嘉泰姆

BGNDD4h嘉泰姆

BGNDD4h嘉泰姆

BGNDD4h嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)D4h嘉泰姆
underneath the IC.D4h嘉泰姆

12D4h嘉泰姆

NCD4h嘉泰姆

NCD4h嘉泰姆

POS3D4h嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internalD4h嘉泰姆
connected of CXSU63137/CXSU63137.D4h嘉泰姆

13D4h嘉泰姆

NCD4h嘉泰姆

NCD4h嘉泰姆

OUT3D4h嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.D4h嘉泰姆

14D4h嘉泰姆

SUPD4h嘉泰姆

SUPD4h嘉泰姆

SUPD4h嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassD4h嘉泰姆
SUP to BGND with a 0.1μF capacitor.D4h嘉泰姆

15D4h嘉泰姆

NCD4h嘉泰姆

POS3D4h嘉泰姆

POS4D4h嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingD4h嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.D4h嘉泰姆

16D4h嘉泰姆

NCD4h嘉泰姆

NEG3D4h嘉泰姆

NEG4D4h嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofD4h嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.D4h嘉泰姆

17D4h嘉泰姆

NCD4h嘉泰姆

OUT3D4h嘉泰姆

OUT4D4h嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofD4h嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.D4h嘉泰姆

18D4h嘉泰姆

ICD4h嘉泰姆

ICD4h嘉泰姆

POS5D4h嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedD4h嘉泰姆
to GND of CXSU63137/CXSU63137.D4h嘉泰姆

19D4h嘉泰姆

NCD4h嘉泰姆

NCD4h嘉泰姆

NEG5D4h嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedD4h嘉泰姆
of CXSU63137/CXSU63137.D4h嘉泰姆

20D4h嘉泰姆

NCD4h嘉泰姆

NCD4h嘉泰姆

OUT5D4h嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.D4h嘉泰姆

21D4h嘉泰姆

LXD4h嘉泰姆

LXD4h嘉泰姆

LXD4h嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductorD4h嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.D4h嘉泰姆

22D4h嘉泰姆

IND4h嘉泰姆

IND4h嘉泰姆

IND4h嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangeD4h嘉泰姆
from 2.6V to 6.5V.D4h嘉泰姆

23D4h嘉泰姆

FBD4h嘉泰姆

FBD4h嘉泰姆

FBD4h嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromD4h嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinD4h嘉泰姆
5mm of FB.D4h嘉泰姆

24D4h嘉泰姆

COMPD4h嘉泰姆

COMPD4h嘉泰姆

COMPD4h嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCD4h嘉泰姆
from COMP to AGND.D4h嘉泰姆

PinFunction DescriptionD4h嘉泰姆

PinD4h嘉泰姆

NameD4h嘉泰姆

Function DescriptionD4h嘉泰姆

CXSU63137D4h嘉泰姆

CXSU63137-1D4h嘉泰姆

CXSU63137-2D4h嘉泰姆

24D4h嘉泰姆

COMPD4h嘉泰姆

COMPD4h嘉泰姆

COMPD4h嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCD4h嘉泰姆
from COMP to AGND.D4h嘉泰姆

25D4h嘉泰姆

FBPD4h嘉泰姆

FBPD4h嘉泰姆

FBPD4h嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of aD4h嘉泰姆
resistive voltage-divider between the regulator output and AGND to set theD4h嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-dividerD4h嘉泰姆
close to the pin.D4h嘉泰姆

26D4h嘉泰姆

DRVPD4h嘉泰姆

DRVPD4h嘉泰姆

DRVPD4h嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channelD4h嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.D4h嘉泰姆

27D4h嘉泰姆

FBND4h嘉泰姆

FBND4h嘉泰姆

FBND4h嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of aD4h嘉泰姆
resistive voltage-divider between the regulator output and REF to set theD4h嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-dividerD4h嘉泰姆
close to the pin.D4h嘉泰姆

28D4h嘉泰姆

DRVND4h嘉泰姆

DRVND4h嘉泰姆

DRVND4h嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channelD4h嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.D4h嘉泰姆

29D4h嘉泰姆

DELD4h嘉泰姆

DELD4h嘉泰姆

DELD4h嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND toD4h嘉泰姆
set the high-voltage switch startup delay.D4h嘉泰姆

30D4h嘉泰姆

CTLD4h嘉泰姆

CTLD4h嘉泰姆

CTLD4h嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchD4h嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andD4h嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCD4h嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isD4h嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thanD4h嘉泰姆
1.25V.D4h嘉泰姆

31D4h嘉泰姆

DRND4h嘉泰姆

DRND4h嘉泰姆

DRND4h嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channelD4h嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedD4h嘉泰姆
VSRC.D4h嘉泰姆

32D4h嘉泰姆

COMD4h嘉泰姆

COMD4h嘉泰姆

COMD4h嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow theD4h嘉泰姆
voltage on COM to exceed VSRC.D4h嘉泰姆

六.电路原理图D4h嘉泰姆
七,功能概述D4h嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:D4h嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.D4h嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.D4h嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.D4h嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.D4h嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.D4h嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.D4h嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upD4h嘉泰姆
八,相关产品D4h嘉泰姆

Switching Regulator > Boost ConverterD4h嘉泰姆

 Part_No D4h嘉泰姆

PackageD4h嘉泰姆

Archi-tecture D4h嘉泰姆

Input D4h嘉泰姆

Voltage    D4h嘉泰姆

Max Adj.D4h嘉泰姆

Output D4h嘉泰姆

Voltage D4h嘉泰姆

Switch Current Limit (max) D4h嘉泰姆

Fixed D4h嘉泰姆

Output D4h嘉泰姆

Voltage  D4h嘉泰姆

Switching D4h嘉泰姆

Frequency D4h嘉泰姆

Internal Power   Switch D4h嘉泰姆

Sync. Rectifier D4h嘉泰姆

 

minD4h嘉泰姆

maxD4h嘉泰姆

minD4h嘉泰姆

maxD4h嘉泰姆

(A)D4h嘉泰姆

(V)D4h嘉泰姆

(kHz)D4h嘉泰姆

 

CXSU63133D4h嘉泰姆

SOT89D4h嘉泰姆

VM D4h嘉泰姆

0.9D4h嘉泰姆

5.5D4h嘉泰姆

2.5D4h嘉泰姆

5.5D4h嘉泰姆

0.5D4h嘉泰姆

1.8|2.6|2.8|3D4h嘉泰姆

|3.3|3.8|4.5|5D4h嘉泰姆

-D4h嘉泰姆

NoD4h嘉泰姆

YesD4h嘉泰姆

CXSU63134D4h嘉泰姆

MSOP8|TSSOP8D4h嘉泰姆

|SOP8D4h嘉泰姆

VMD4h嘉泰姆

2.5D4h嘉泰姆

5.5D4h嘉泰姆

2.5D4h嘉泰姆

-D4h嘉泰姆

-D4h嘉泰姆

-D4h嘉泰姆

200 ~ 1000D4h嘉泰姆

NoD4h嘉泰姆

NoD4h嘉泰姆

CXSU63135D4h嘉泰姆

TSSOP8|SOP-8PD4h嘉泰姆

VMD4h嘉泰姆

1D4h嘉泰姆

5.5D4h嘉泰姆

2.5D4h嘉泰姆

5D4h嘉泰姆

1D4h嘉泰姆

2.5|3.3D4h嘉泰姆

300D4h嘉泰姆

YesD4h嘉泰姆

YesD4h嘉泰姆

CXSU63136D4h嘉泰姆

SOP8D4h嘉泰姆

CMD4h嘉泰姆

3D4h嘉泰姆

40D4h嘉泰姆

1.25D4h嘉泰姆

40D4h嘉泰姆

1.5D4h嘉泰姆

-D4h嘉泰姆

33 ~ 100D4h嘉泰姆

YesD4h嘉泰姆

NoD4h嘉泰姆

CXSU63137D4h嘉泰姆

TQFN5x5-32D4h嘉泰姆

CMD4h嘉泰姆

2.5D4h嘉泰姆

6.5D4h嘉泰姆

2.5D4h嘉泰姆

18D4h嘉泰姆

3D4h嘉泰姆

NoD4h嘉泰姆

1200D4h嘉泰姆

YesD4h嘉泰姆

NoD4h嘉泰姆

CXSU63138D4h嘉泰姆

TSOT23-5D4h嘉泰姆

TDFN2x2-6D4h嘉泰姆

CMD4h嘉泰姆

2.5D4h嘉泰姆

6D4h嘉泰姆

2.5D4h嘉泰姆

20D4h嘉泰姆

2D4h嘉泰姆

-D4h嘉泰姆

1500D4h嘉泰姆

YesD4h嘉泰姆

NoD4h嘉泰姆

CXSU63139D4h嘉泰姆

TQFN4x4-6D4h嘉泰姆

TDFN3x3-12D4h嘉泰姆

CMD4h嘉泰姆

1.8D4h嘉泰姆

5.5D4h嘉泰姆

2.7D4h嘉泰姆

5.5D4h嘉泰姆

5D4h嘉泰姆

-D4h嘉泰姆

1.2D4h嘉泰姆

YesD4h嘉泰姆

YesD4h嘉泰姆

CXSU63140D4h嘉泰姆

SOT23-5D4h嘉泰姆

CMD4h嘉泰姆

2.5D4h嘉泰姆

6D4h嘉泰姆

2.5D4h嘉泰姆

32D4h嘉泰姆

1D4h嘉泰姆

-D4h嘉泰姆

1000D4h嘉泰姆

YesD4h嘉泰姆

NoD4h嘉泰姆

CXSU63141D4h嘉泰姆

TSOT-23-6 D4h嘉泰姆

TDFN2x2-8D4h嘉泰姆

CMD4h嘉泰姆

1.2D4h嘉泰姆

5.5D4h嘉泰姆

1.8D4h嘉泰姆

5.5D4h嘉泰姆

1.2D4h嘉泰姆

-D4h嘉泰姆

1.2D4h嘉泰姆

YesD4h嘉泰姆

YesD4h嘉泰姆

 D4h嘉泰姆