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English单相定时同步的PWM控制器CXSD62102驱动N通道mosfet瞬态响应和准确的直流电压以PFM或PWM模式输出
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目录 1.产品概述 2.产品特点 一,产品概述(General Description) 需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！ 五,产品封装图 (Package) |
六.电路原理图
七,功能概述
Input Capacitor Selection (Cont.)
higher than the maximum input voltage. The maximum RMS current rating requirement is approximately IOUT/2,where IOUT is the load current. During power-up, the input capacitors have to handle great amount of surge current.For low-duty notebook appliactions, ceramic capacitor is recommended. The capacitors must be connected be-tween the drain of high-side MOSFET and the source of low-side MOSFET with very low-impeadance PCB layout.
MOSFET Selection
The application for a notebook battery with a maximum voltage of 24V, at least a minimum 30V MOSFETs should
be used. The design has to trade off the gate charge with the RDS(ON) of the MOSFET:For the low-side MOSFET, before it is turned on, the body diode has been conducting. The low-side MOSFET driver will not charge the miller capacitor of this MOSFET.
In the turning off process of the low-side MOSFET, the load current will shift to the body diode first. The high dv/dt of the phase node voltage will charge the miller capaci-tor through the low-side MOSFET driver sinking current path. This results in much less switching
loss of the low-side MOSFETs. The duty cycle is often very small in high battery voltage applications, and the low-side MOSFET will conduct most of the switching cycle; therefore, when using smaller RDS(ON) of the low-side MOSFET, the con-verter can reduce power loss. The gate charge for this MOSFET is usually the secondary consideration. The high-side MOSFET does not have this zero voltage switch-ing condition; in addition, it conducts for less time com-pared to the low-side MOSFET, so the switching loss tends to be dominant. Priority should be given to the MOSFETs with less gate charge, so that both the gate driver loss and switching loss will be minimized.
The selection of the N-channel power MOSFETs are determined by the R DS(ON), reversing transfer capaci-tance (CRSS) and maximum output current requirement.The losses in the MOSFETs have two components:
conduction loss and transition loss. For the high-side and low-side MOSFETs, the losses are approximately
given by the following equations:
Phigh-side = IOUT (1+ TC)(RDS(ON))D + (0.5)( IOUT)(VIN)( tSW)FSW
Plow-side = IOUT (1+ TC)(RDS(ON))(1-D) is the load current TC is the temperature dependency of RDS(ON)
FSW is the switching frequency tSW is the switching interval D is the duty cycleNote that both MOSFETs have conduction losses while the high-side MOSFET includes an additional transition loss.The switching interval, tSW, is the function of the reverse transfer capacitance CRSS. The (1+TC) term is a factor in the temperature dependency of the RDS(ON) and can be extracted from the “RDS(ON) vs. Temperature” curve of the power MOSFET.
Layout Consideration
In any high switching frequency converter, a correct layout is important to ensure proper operation of the regulator.
With power devices switching at higher frequency, the resulting current transient will cause voltage spike across
the interconnecting impedance and parasitic circuit elements. As an example, consider the turn-off transition
of the PWM MOSFET. Before turn-off condition, the MOSFET is carrying the full load current. During turn-off,
current stops flowing in the MOSFET and is freewheeling by the low side MOSFET and parasitic diode. Any parasitic
inductance of the circuit generates a large voltage spike during the switching interval. In general, using short and
wide printed circuit traces should minimize interconnect-ing impedances and the magnitude of voltage spike.
Besides, signal and power grounds are to be kept sepa-rating and finally combined using ground plane construc-
tion or single point grounding. The best tie-point between the signal ground and the power ground is at the nega-
tive side of the output capacitor on each channel, where there is less noise. Noisy traces beneath the IC are not
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Switching Regulator > Buck Controller |
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Part_No |
Package |
Archi tectu |
Phase |
No.of PWM Output |
Output Current (A) |
Input Voltage (V) |
Reference Voltage (V) |
Bias Voltage (V) |
Quiescent Current (uA) |
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min |
max |
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SOP-14 QSOP-16 QFN4x4-16 |
VM |
1 |
1 |
30 |
2.9 |
13.2 |
0.9 |
12 |
8000 |
|
|
SOP-8 |
VM |
1 |
1 |
20 |
2.9 |
13.2 |
0.8 |
12 |
5000 |
|
|
SOP-8 |
VM |
1 |
1 |
20 |
2.9 |
13.2 |
0.8 |
12 |
5000 |
|
|
QFN4x4-24 |
VM |
2 |
1 |
60 |
3.1 |
13.2 |
0.6 |
12 |
5000 |
|
|
SOP-8 |
VM |
1 |
1 |
20 |
2.2 |
13.2 |
0.8 |
5~12 |
2100 |
|
|
SOP-8 |
VM |
1 |
1 |
20 |
2.2 |
13.2 |
0.8 |
5~12 |
2100 |
|
|
SOP8|TSSOP8 |
VM |
1 |
1 |
5 |
5 |
13.2 |
1.25|0.8 |
5~12 |
3000 |
|
|
SOP-8 |
VM |
1 |
1 |
10 |
3.3 |
5.5 |
0.8 |
5 |
2100 |
|
|
SOP-14 |
VM |
1 |
1 |
10 |
5 |
13.2 |
0.8 |
12 |
2000 |
|
|
TSSOP-24 |QFN5x5-32 |
VM |
1 |
2 |
20 |
5 |
13.2 |
0.6 |
5~12 |
4000 |
|
|
SOP14 QSOP16 QFN-16 |
VM |
1 |
1 |
30 |
2.9 |
13.2 |
0.9 |
12 |
4000 |
|
|
SOP-14 |
VM |
1 |
1 |
30 |
2.2 |
13.2 |
0.6 |
12 |
5000 |
|
|
SOP-14 |
VM |
1 |
1 |
30 |
2.2 |
13.2 |
0.6 |
12 |
5000 |
|
|
SOP-14 |
VM |
1 |
1 |
25 |
2.2 |
13.2 |
0.8 |
12 |
5000 |
|
|
LQFP7x7 48 TQFN7x7-48 |
VM |
1 |
6 |
0.015 |
1.4 |
6.5 |
- |
5 |
1800 |
|
|
TSSOP-24P |
VM |
1 |
2 |
20 |
2.97 |
5.5 |
0.8 |
5~12 |
5000 |
|
|
SOP-14 |
VM |
1 |
1 |
10 |
5 |
13.2 |
0.8 |
12 |
3000 |
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SOP-8-P|DIP-8 |
VM |
1 |
1 |
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