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首页 > 产品中心 > 电源管理 > DC降压型转换器 > Buck降压型芯片 >CXSD62113|C双降压恒定开启时间同步的PWM控制器每个通道驱动双N通道mosfet
CXSD62113|C双降压恒定开启时间同步的PWM控制器每个通道驱动双N通道mosfet
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CXSD62113|C将双降压、恒定时间、同步PWM控制器(为每个通道驱动双N通道mosfet)和两个低电压降稳压器以及各种保护集成到一个芯片中。PWM控制器降压电池的高电压以产生用于NB应用的低电压。PWM1和PWM2的输出可以通过在VOUTx和GND之间设置电阻分压器从2V调整到5.5V。

CXSD62113|C双降压恒定开启时间同步的PWM控制器每个通道驱动双N通道mosfet
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产品简介

目录7d6嘉泰姆

1.产品概述                       2.产品特点7d6嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 7d6嘉泰姆
5.产品封装图                     6.电路原理图                   7d6嘉泰姆
7.功能概述                        8.相关产品7d6嘉泰姆

一,产品概述(General Description)         7d6嘉泰姆


  The CXSD62113 CXSD62113A CXSD62113B CXSD62113C CXSD62113E integrates dual step-down, constant-on-time,synchronous PWM controllers (that drives dual N-channel MOSFETs for each channel) and two low drop-out regulators as well as various protections into a chip.The PWM controllers step down high voltage of a battery to generate low-voltage for NB applications. The output of PWM1 and PWM2 can be adjusted from 2V to 5.5V by setting a resistive voltage-divider from VOUTx to GND.7d6嘉泰姆

The linear regulators provide 5V and 3.3V output for standby power supply. The linear regulators provide up to 100mA output current. When the PWMx output voltage is higher than LDOx bypass threshold, the related LDOx regulator is shut off and its output is connected to VOUTx by internal switchover MOSFET. It can save power dissipation. The charge pump circuit with 270kHz clock driver uses VOUT1 as its power supply to generate ap-proximately 15V DC voltage.7d6嘉泰姆
  The CXSD62113/A/B/C provides excellent transient response and accurate DC output voltage in either PFM or PWM Mode. In Pulse-Frequency Mode (PFM), the7d6嘉泰姆
CXSD62113/A/B/C provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. The Forced-PWM Mode works nearly at7d6嘉泰姆

constant frequency for low-noise requirements. The unique ultrasonic mode  maintains the switching frequency above 25kHz, which eliminates noise in7d6嘉泰姆
audio application.7d6嘉泰姆
  The CXSD62113/A/B/C is equipped with accurate sourc-ing and current-limit, output under-voltage output over-voltage protections, being perfect for NB applications. A 1.4ms (typ.) digital soft-start can reduce the start-up current. A soft-stop function actively discharges the output capacitors by the discharge device. The CXSD62113/A/B has individual enable controls for each PWM channels. Pulling both EN1/2 pin low shuts down the all of outputs unless LDO3 output. The LDO3 and LDO5 of CXSD62113A/C are always on standby power.7d6嘉泰姆
The CXSD62113/A/B/C is available in a TQFN3x3-20 package.7d6嘉泰姆
二.产品特点(Features)7d6嘉泰姆


Wide Input voltage Range from 6V to 25V7d6嘉泰姆
Provide 5 Independent Outputs with ±1.0% Accuracy Over-Temperature7d6嘉泰姆
- PWM1 Controller with Adjustable (2V to 5.5V) Out-put7d6嘉泰姆
PWM2 Controller with Adjustable (2V to 5.5V) Out-put7d6嘉泰姆
100mA Low Dropout Regulator (LDO5) with Fixed 5V Output7d6嘉泰姆
100mA Low Dropout Regulator (LDO3) with Fixed 3.3V Output7d6嘉泰姆
270kHz Clock Signal for 15V Charge Pump (Used VOUT1 as Its Power Supply)7d6嘉泰姆
Excellent Line/Load Regulations about ±1.5% Over-Temperature Range7d6嘉泰姆
Built in POR Control Scheme Implemented7d6嘉泰姆
Constant On-Time Control Scheme with Frequency7d6嘉泰姆
Compensation for PWM Mode7d6嘉泰姆
Selectable Switching Frequency in PWM Mode7d6嘉泰姆
Built-in Digital Soft-Start for PWM Outputs and Soft-7d6嘉泰姆
Stop for PWM Outputs and LDO Outputs7d6嘉泰姆
Integrated Bootstrap Forward P-CH MOSFET7d6嘉泰姆
High Efficiency over Light to Full Load Range (PWMs)7d6嘉泰姆
Built-in Power Good Indicators (PWMs)7d6嘉泰姆
Independent Enable Inputs (PWMs, LDO)7d6嘉泰姆
70% Under-Voltage and 125% Over-Voltage Protec-tions (PWM)7d6嘉泰姆
Adjustable Current-Limit Protection (PWMs)7d6嘉泰姆
- Using Sense Low-Side MOSFET’s RDS(ON)7d6嘉泰姆
Over-Temperature Protection7d6嘉泰姆
3mmx3mm Thin QFN-20 (TQFN3x3-20) package7d6嘉泰姆
Lead Free and Green Device Available (RoHS Compliant)7d6嘉泰姆
三,应用范围 (Applications)7d6嘉泰姆


Notebook and Sub-Notebook Computers7d6嘉泰姆
Portable Devices7d6嘉泰姆
DDR1, DDR2, and DDR3 Power Supplies7d6嘉泰姆
3-Cell and 4-Cell Li+ Battery-Powered Devices7d6嘉泰姆
Graphic Cards7d6嘉泰姆
Game Consoles7d6嘉泰姆
Telecommunications7d6嘉泰姆
四.下载产品资料PDF文档 7d6嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持7d6嘉泰姆

 QQ截图20160419174301.jpg7d6嘉泰姆

五,产品封装图 (Package)7d6嘉泰姆


blob.png7d6嘉泰姆
blob.png7d6嘉泰姆

blob.png7d6嘉泰姆

六.电路原理图7d6嘉泰姆


blob.png7d6嘉泰姆

blob.png7d6嘉泰姆

七,功能概述7d6嘉泰姆


Input Capacitor Selection7d6嘉泰姆
The input capacitor is chosen based on the voltage rating and the RMS current rating. For reliable operation, select the capacitor voltage rating to be at least 1.3 times higher than the maximum input voltage. The maximum RMS current rating requirement is approximately IOUT/2, where IOUT is the load current. During power up, the input capaci-tors have to handle large amount of surge current. In low-duty notebook appliactions, ceramic capacitors are remmended. The capacitors must be connected between the drain of high-side MOSFET and the source of low-side MOSFET with very low-impeadance PCB layout.7d6嘉泰姆
 MOSFET Selection7d6嘉泰姆
The application for a notebook battery with a maximum volt-age of 24V, at least a minimum 30V MOSFETs should be used. The design has to trade off the gate charge with the RDS(ON) of the MOSFET:7d6嘉泰姆
· For the low-side MOSFET, before it is turned on, the body diode has been conducted. The low-side MOSFET7d6嘉泰姆
driver will not charge the miller capacitor of this MOSFET.7d6嘉泰姆
In the turning off process of the low-side MOSFET,the load current will shift to the body diode first. The7d6嘉泰姆
high dv/dt of the phase node voltage will charge the miller capacitor through the low-side MOSFET driver7d6嘉泰姆
sinking current path. This results in much less switching loss of the low-side MOSFETs. The duty7d6嘉泰姆
cycle is often very small in high battery voltage applications, and the low-side MOSFET will con-7d6嘉泰姆
duct most of the switching cycle; therefore, the less the RDS(ON) of the low-side MOSFET, the less the power7d6嘉泰姆
loss. The gate charge for this MOSFET is usually a secondary consideration. The high-side MOSFET7d6嘉泰姆
does not have this zero voltage switching condition, and because it conducts for less time7d6嘉泰姆
compared to the low-side MOSFET, the switching loss tends to be dominant. Priority should be given7d6嘉泰姆
to the MOSFETs with less gate charge, so that both the gate driver loss and switching loss will be minimized.7d6嘉泰姆
The selection of the N-channel power MOSFETs are de-termined by the RDS(ON), reversing transfer capacitance7d6嘉泰姆
Layout Consideration7d6嘉泰姆
In any high switching frequency converter, a correct layout is important to ensure proper operation of the regulator.7d6嘉泰姆
With power devices switching at higher frequency, the resulting current transient will cause voltage spike across the interconnecting impedance and parasitic circuit elements. As an example, consider the turn-off transition of the PWM MOSFET. Before turn-off condition, the MOSFET is carrying the full load current. During turn-off,current stops flowing in the MOSFET and is freewheeling by the lower MOSFET and parasitic diode. Any parasitic inductance of the circuit generates a large voltage spike during the switching interval. In general, using short and wide printed circuit traces should minimize interconnect-ing impedances and the magnitude of voltage spike. And signal and power grounds are to be kept separating and finally combined to use the ground plane construction or single point grounding. The best tie-point between the signal ground and the power ground is at the negative side of the output capacitor on each channel, where there is less noise. Noisy traces beneath the IC are not recommended. Below is a checklist for your layout:7d6嘉泰姆
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4.57d6嘉泰姆

257d6嘉泰姆

0.67d6嘉泰姆

5~127d6嘉泰姆

807d6嘉泰姆

CXSD6299|A7d6嘉泰姆

SOP-8P7d6嘉泰姆

VM7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

257d6嘉泰姆

4.57d6嘉泰姆

13.27d6嘉泰姆

0.87d6嘉泰姆

5~127d6嘉泰姆

160007d6嘉泰姆

CXSD621007d6嘉泰姆

TQFN3x3-107d6嘉泰姆

VM7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

257d6嘉泰姆

4.57d6嘉泰姆

13.27d6嘉泰姆

0.67d6嘉泰姆

5~127d6嘉泰姆

25007d6嘉泰姆

CXSD62101|L7d6嘉泰姆

TDFN3x3-107d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

307d6嘉泰姆

37d6嘉泰姆

257d6嘉泰姆

0.87d6嘉泰姆

5~127d6嘉泰姆

20007d6嘉泰姆

CXSD621027d6嘉泰姆

TQFN3x3-167d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

307d6嘉泰姆

1.87d6嘉泰姆

287d6嘉泰姆

0.67d6嘉泰姆

57d6嘉泰姆

6007d6嘉泰姆

CXSD62102A7d6嘉泰姆

TQFN 3x3 167d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

307d6嘉泰姆

1.87d6嘉泰姆

287d6嘉泰姆

0.67d6嘉泰姆

57d6嘉泰姆

6007d6嘉泰姆

CXSD621037d6嘉泰姆

QFN4x4-247d6嘉泰姆

VM7d6嘉泰姆

27d6嘉泰姆

17d6嘉泰姆

507d6嘉泰姆

4.57d6嘉泰姆

13.27d6嘉泰姆

0.67d6嘉泰姆

5~127d6嘉泰姆

50007d6嘉泰姆

CXSD621047d6嘉泰姆

TQFN4x4-247d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

157d6嘉泰姆

67d6嘉泰姆

257d6嘉泰姆

27d6嘉泰姆

N7d6嘉泰姆

5507d6嘉泰姆

CXSD621057d6嘉泰姆

TQFN4x4-247d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

157d6嘉泰姆

67d6嘉泰姆

257d6嘉泰姆

27d6嘉泰姆

N7d6嘉泰姆

5507d6嘉泰姆

CXSD62106|A7d6嘉泰姆

TQFN4x4-47d6嘉泰姆

TQFN3x3-207d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

207d6嘉泰姆

37d6嘉泰姆

287d6嘉泰姆

0.757d6嘉泰姆

57d6嘉泰姆

8007d6嘉泰姆

CXSD621077d6嘉泰姆

TQFN3x3-167d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

207d6嘉泰姆

1.87d6嘉泰姆

287d6嘉泰姆

0.757d6嘉泰姆

57d6嘉泰姆

4007d6嘉泰姆

CXSD621087d6嘉泰姆

QFN3.5x3.5-147d6嘉泰姆

TQFN3x3-167d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

207d6嘉泰姆

1.87d6嘉泰姆

287d6嘉泰姆

0.757d6嘉泰姆

57d6嘉泰姆

4007d6嘉泰姆

CXSD621097d6嘉泰姆

TQFN3x3-167d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

207d6嘉泰姆

1.87d6嘉泰姆

287d6嘉泰姆

0.757d6嘉泰姆

57d6嘉泰姆

4007d6嘉泰姆

CXSD621107d6嘉泰姆

QFN3x3-207d6嘉泰姆

TQFN3x3-167d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

207d6嘉泰姆

37d6嘉泰姆

287d6嘉泰姆

1.8|1.5|0.57d6嘉泰姆

57d6嘉泰姆

7407d6嘉泰姆

CXSD621117d6嘉泰姆

TQFN4x4-247d6嘉泰姆

|QFN3x3-207d6嘉泰姆

CM7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

157d6嘉泰姆

57d6嘉泰姆

287d6嘉泰姆

0.57d6嘉泰姆

N7d6嘉泰姆

30007d6嘉泰姆

CXSD621127d6嘉泰姆

TDFN3x3-107d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

207d6嘉泰姆

1.87d6嘉泰姆

287d6嘉泰姆

0.57d6嘉泰姆

57d6嘉泰姆

2507d6嘉泰姆

CXSD62113|C7d6嘉泰姆

TQFN3x3-207d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

157d6嘉泰姆

67d6嘉泰姆

257d6嘉泰姆

27d6嘉泰姆

N7d6嘉泰姆

5507d6嘉泰姆

CXSD62113E7d6嘉泰姆

TQFN 3x3 207d6嘉泰姆

COT7d6嘉泰姆

27d6嘉泰姆

27d6嘉泰姆

117d6嘉泰姆

67d6嘉泰姆

257d6嘉泰姆

27d6嘉泰姆

N7d6嘉泰姆

5507d6嘉泰姆

CXSD621147d6嘉泰姆

TQFN3x3-207d6嘉泰姆

COT7d6嘉泰姆

27d6嘉泰姆

27d6嘉泰姆

117d6嘉泰姆

5.57d6嘉泰姆

257d6嘉泰姆

27d6嘉泰姆

N7d6嘉泰姆

2807d6嘉泰姆

CXSD621157d6嘉泰姆

QFN4x4-247d6嘉泰姆

VM7d6嘉泰姆

27d6嘉泰姆

17d6嘉泰姆

607d6嘉泰姆

3.17d6嘉泰姆

13.27d6嘉泰姆

0.857d6嘉泰姆

127d6嘉泰姆

50007d6嘉泰姆

CXSD62116A|B|C7d6嘉泰姆

SOP-8P7d6嘉泰姆

VM7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

207d6嘉泰姆

2.97d6嘉泰姆

13.27d6嘉泰姆

0.87d6嘉泰姆

127d6嘉泰姆

160007d6嘉泰姆

CXSD621177d6嘉泰姆

SOP-207d6嘉泰姆

VM7d6嘉泰姆

27d6嘉泰姆

27d6嘉泰姆

307d6嘉泰姆

107d6嘉泰姆

13.27d6嘉泰姆

17d6嘉泰姆

127d6嘉泰姆

50007d6嘉泰姆

CXSD621187d6嘉泰姆

TDFN3x3-107d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

17d6嘉泰姆

257d6嘉泰姆

1.87d6嘉泰姆

287d6嘉泰姆

0.77d6嘉泰姆

57d6嘉泰姆

2507d6嘉泰姆

CXSD621197d6嘉泰姆

TQFN3x3-207d6嘉泰姆

COT7d6嘉泰姆

27d6嘉泰姆

17d6嘉泰姆

407d6嘉泰姆

1.87d6嘉泰姆

257d6嘉泰姆

REFIN Setting7d6嘉泰姆

57d6嘉泰姆

7007d6嘉泰姆

CXSD621207d6嘉泰姆

QFN 3x3 207d6嘉泰姆

TQFN 3x3 167d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

207d6嘉泰姆

37d6嘉泰姆

287d6嘉泰姆

1.8|1.5 1.35|1.2 0.57d6嘉泰姆

57d6嘉泰姆

8007d6嘉泰姆

CXSD62121A7d6嘉泰姆

TQFN3x3 207d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

157d6嘉泰姆

37d6嘉泰姆

287d6嘉泰姆

0.757d6嘉泰姆

57d6嘉泰姆

2207d6嘉泰姆

CXSD62121B7d6嘉泰姆

TQFN3x3 207d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

157d6嘉泰姆

37d6嘉泰姆

287d6嘉泰姆

0.757d6嘉泰姆

57d6嘉泰姆

2207d6嘉泰姆

CXSD621217d6嘉泰姆

TQFN3x3-207d6嘉泰姆

COT7d6嘉泰姆

17d6嘉泰姆

27d6嘉泰姆

207d6嘉泰姆

37d6嘉泰姆

287d6嘉泰姆

0.757d6嘉泰姆

57d6嘉泰姆

1807d6嘉泰姆

 7d6嘉泰姆