CXSD6280两个同步降压型脉宽调制控制器高精度内部参考电压的线性控制器PWM控制器同步buck拓扑中的两个N沟道mosfet

发布时间:2020-04-21 16:27:33 浏览次数:332 作者:oumao18 来源:嘉泰姆
摘要:CXSD6280PWM控制器设计用于驱动同步buck拓扑中的两个N沟道mosfet,以及控制器驱动外部N沟道MOSFET。设备要求12V和5V电源,如果5V电源不可用,VCC12可以为5V电源提供可选的5.8V并联调节器。所有输出都有通过SS/EN引脚控制独立软启动和启用功能。将每个SS/EN引脚的电容器接地,以设置软启动时间,将SS/EN引脚拉到1V以下以禁用调节器
CXSD6280两个同步降压型脉宽调制控制器高精度内部参考电压的线性控制器PWM控制器同步buck拓扑中的两个N沟道mosfet

目录iQN嘉泰姆

1.产品概述                       2.产品特点iQN嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 iQN嘉泰姆
5.产品封装图                     6.电路原理图                   iQN嘉泰姆
7.功能概述                        8.相关产品iQN嘉泰姆

一,产品概述(General Description)         iQN嘉泰姆


          The CXSD6280 has two synchronous buck PWM control-lersiQN嘉泰姆
and one linear controller with high precision internal references voltageiQN嘉泰姆
to offer accurate outputs. The PWM controllers are designed to driveiQN嘉泰姆
two N-channel MOSFETs in synchronous buck topology, and the lineariQN嘉泰姆
controller drives an external N-channel MOSFET. The device re-quiresiQN嘉泰姆
12V and 5V power supplies, if the 5V supply is not available, VCC12 caniQN嘉泰姆
offer an optional shunt regulator 5.8V for 5V supply.All outputs haveiQN嘉泰姆
independent soft-start and enable func-tions by SS/EN pins to control.iQN嘉泰姆
Connect a capacitor from each SS/EN pin to the ground for setting theiQN嘉泰姆
soft-start time, and pulling the SS/EN pin below 1V to disable regulator.iQN嘉泰姆
Pull the SS2/EN2 to VCC, enter the DDR mode,the SS1/EN1 controlsiQN嘉泰姆
both VOUT1 and VOUT2, and al-lows VOUT2 to track VOUT1. It alsoiQN嘉泰姆
offers the phase shift function by REFOUT pin to select the phase shiftiQN嘉泰姆
between VOUT1 and VOUT2 in DDR mode or Independent mode.iQN嘉泰姆
When all SS/EN pins exceed 3.3V and no faults are detected, the PGOODiQN嘉泰姆
pin goes high to indicate the regu-lators are ready. If any of the SS/EN pinsiQN嘉泰姆
goes below 3.2V or any of the outputs has a fault condition, the PGOOD piniQN嘉泰姆
will be pulled low.iQN嘉泰姆
     The internal oscillator is nominally 300kHz (keep the FS/SYNC pin openiQN嘉泰姆
or short to GND), and it offers the pro-grammable frequency function fromiQN嘉泰姆
70kHz to 800kHz; con-necting a resistor from FS/SYNC to VCC12 to decreaseiQN嘉泰姆
the frequency, conversely, connect a resistor from FS/SYNC to GND toiQN嘉泰姆
increase the frequency.The IC also pro-vides the synchronous frequencyiQN嘉泰姆
function. Connect the LGATE signal of another converter to FS/SYNC pin;iQN嘉泰姆
forc-ing the switching frequency to follow the external clock.
         The possible synchronous frequency is from 150kHz to 800kHz. ThereiQN嘉泰姆
is no Rds(on) sensing or under-voltage sens-ing on CXSD6280. However, itiQN嘉泰姆
provides a simple short-circuit protection by monitoring the COMP1 and COMP2iQN嘉泰姆
for over-voltage. When any of two pins exceeds their trip point and the conditioniQN嘉泰姆
persists for 1-2 internal clock cycle (3-6μs at 300kHz), then it will shut downiQN嘉泰姆
all regulators.iQN嘉泰姆
二.产品特点(Features)iQN嘉泰姆


1.)Two Synchronous Buck Converters and A Linear RegulatoriQN嘉泰姆
2.)VIN Range up to 12ViQN嘉泰姆
3.)Input Power Supplies Require 12V and 5V oriQN嘉泰姆
4.)Use 12V to Generate a Shunt Regulator 5.8ViQN嘉泰姆
5.)0.6V Reference for VOUT1 and VOUT3 with 0.8% AccurateiQN嘉泰姆
6.)3.3V Reference for VOUT2 with 0.8% AccurateiQN嘉泰姆
7.)Buffered VTT Reference OutputiQN嘉泰姆
8.)Three Outputs have Independent Soft-Start and EnableiQN嘉泰姆
9.)Internal 300kHz Oscillator and ProgrammableiQN嘉泰姆
10.)Frequency Range from 70 kHz to 800kHziQN嘉泰姆
11.)Synchronous Switching FrequencyiQN嘉泰姆
12.)DDR Mode or Independent Mode SelectioniQN嘉泰姆
13.)Phase Shift SelectioniQN嘉泰姆
14.)Power Good FunctioniQN嘉泰姆

15.)Short-Circuit Protection for VOUT1 and VOUT2iQN嘉泰姆
16.)Thermally Enhanced TSSOP-24P and QFN5x5-32 PackagesiQN嘉泰姆
17.)Lead Free and Green Devices Available (RoHS Compliant) iQN嘉泰姆
三,应用范围 (Applications)iQN嘉泰姆


Graphic CardsiQN嘉泰姆
DDR memory Power SuppliesiQN嘉泰姆
Low-Voltage Distributed Power SuppliesiQN嘉泰姆
四.下载产品资料PDF文档 iQN嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持iQN嘉泰姆

 QQ截图20160419174301.jpgiQN嘉泰姆

五,产品封装图 (Package)iQN嘉泰姆


iQN嘉泰姆
FUNCTIONNAMEFUNCTIONiQN嘉泰姆
These pins are the outputs of error amplifiers of their respective regulators. They areiQN嘉泰姆
used to set the compensation components.iQN嘉泰姆
These pins provide two functions. Connect a capacitor to the GND for setting theiQN嘉泰姆
soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable theiQN嘉泰姆
respective output, leave open to enable the respective output.iQN嘉泰姆
These pins provide two functions. Connect a capacitor to the GND for setting theiQN嘉泰姆
soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable theiQN嘉泰姆
respective output, leave open to enable the respective output.iQN嘉泰姆

PINiQN嘉泰姆

FUNCTIONiQN嘉泰姆

NO.iQN嘉泰姆

NAMEiQN嘉泰姆

TSSOP-24PiQN嘉泰姆

DFN5x5-32iQN嘉泰姆

       

1iQN嘉泰姆

29iQN嘉泰姆

FB1iQN嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.iQN嘉泰姆

2iQN嘉泰姆

30iQN嘉泰姆

COMP1iQN嘉泰姆

These pins are the outputs of error amplifiers of their respective regulators. They are used to set the compensation components.iQN嘉泰姆

3iQN嘉泰姆

31iQN嘉泰姆

COMP2iQN嘉泰姆

4iQN嘉泰姆

32iQN嘉泰姆

FB2iQN嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.iQN嘉泰姆

5iQN嘉泰姆

1iQN嘉泰姆

REFINiQN嘉泰姆

This pin is the reference input voltage of error amplifier of the VOUT2. It also provides the voltage into a buffer, which is out on the REFOUT pin.iQN嘉泰姆

6iQN嘉泰姆

3iQN嘉泰姆

REFOUTiQN嘉泰姆

This pin provides a buffed voltage, which is from REFIN pin. In Independent mode, it can be used by other ICs. In DDR mode, it is from the VOUT1, and can be used as the VTT buffer. This pin also uses to select the phase shift (see table1). When this piniQN嘉泰姆
pulls to VCC, the buffer is disabled and the REFOUT is not available for use. It is recommended that a 0.1μF capacitor is connected to the ground for stability.iQN嘉泰姆

7iQN嘉泰姆

4iQN嘉泰姆

SS1/EN1iQN嘉泰姆

These pins provide two functions. Connect a capacitor to the GND for setting the soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable the respective output, leave open to enable the respective output.iQN嘉泰姆

8iQN嘉泰姆

5iQN嘉泰姆

SS2/EN2iQN嘉泰姆

9iQN嘉泰姆

6iQN嘉泰姆

SS3/EN3iQN嘉泰姆

10iQN嘉泰姆

7iQN嘉泰姆

VREFiQN嘉泰姆

This pin provides a 3.3V reference voltage, which can be used by the REFIN pin or other ICs as a voltage reference. It is recommended that a 1μF capacitor is connected to ground for stabilityiQN嘉泰姆

11iQN嘉泰姆

8iQN嘉泰姆

DRIVE3iQN嘉泰姆

This pin drives the gate of an external N-channel MOSFET for linear regulator.iQN嘉泰姆

12iQN嘉泰姆

10iQN嘉泰姆

FB3iQN嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.iQN嘉泰姆

13iQN嘉泰姆

11iQN嘉泰姆

FS/SYNCiQN嘉泰姆

This pin is used to adjust the switching frequency. Connecting a resistor from FS/SYNC pin to the ground increases the switching frequency. Conversely,connecting a resistor from this pin to the VCC12 reduces the switching frequency. In addition, this pin also provides synchronous frequency function. An external clock can be fed into this pin, and force the switching frequency to follow the external clock.iQN嘉泰姆

14iQN嘉泰姆

12iQN嘉泰姆

PGOODiQN嘉泰姆

This pin is an open drain device; connect a pull up resistor to the VCC for PGOOD function.iQN嘉泰姆

15iQN嘉泰姆

13iQN嘉泰姆

GNDiQN嘉泰姆

This pin is the signal ground pin. The metal thermal pad under the package is the IC substrate; connects the GND pin and metal thermal pad together on the board, and ties to the good GND plane for electrical and thermal conduction.iQN嘉泰姆

16iQN嘉泰姆

16iQN嘉泰姆

BOOT2iQN嘉泰姆

These pins provide the bootstrap voltage to the gate driver for driving the upper MOSFETs. It can be connected to a power voltage directly, but the difference voltage between the BOOT and VIN must be high enough to drive the upper MOSFETs.iQN嘉泰姆

17iQN嘉泰姆

14iQN嘉泰姆

UGATE2iQN嘉泰姆

These pins provide the gate driver for the upper MOSFETs of VOUT1 and VOUT2.iQN嘉泰姆

18iQN嘉泰姆

18,23iQN嘉泰姆

PGNDiQN嘉泰姆

This pin is the power ground pin for the gate driver and linear driver circuit. It should be tied to the GND.iQN嘉泰姆

19iQN嘉泰姆

20iQN嘉泰姆

LGATE2iQN嘉泰姆

These pins provide the gate driver for the lower MOSFETs of VOUT1 and VOUT2.iQN嘉泰姆

20iQN嘉泰姆

21iQN嘉泰姆

LGATE1iQN嘉泰姆

These pins provide the gate driver for the lower MOSFETs of VOUT1 and VOUT2.iQN嘉泰姆

21iQN嘉泰姆

19, 22iQN嘉泰姆

VCC12iQN嘉泰姆

Power supply input pin. Connect a nominal 12V power supply to this pin for the gate driver. It is recommended that a decoupling capacitor (1 to 10μF) is connected to the GND for noise decoupling.iQN嘉泰姆

六.电路原理图iQN嘉泰姆


blob.pngiQN嘉泰姆

七,功能概述iQN嘉泰姆


Soft-Start/EnableiQN嘉泰姆
The three SS/EN pins control the soft-start and enable or disable the controller. In Independent mode, the threeiQN嘉泰姆
regulators all have independent soft-start and enable functions. Connect a soft-start capacitor from each SS/ENiQN嘉泰姆
pin to the GND to set the soft-start interval, and an open drain logic signal for each SS/EN pin will enable or dis-iQN嘉泰姆
able the respective output.iQN嘉泰姆

八,相关产品            更多同类产品......  iQN嘉泰姆


Switching Regulator >   Buck ControlleriQN嘉泰姆

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ArchiiQN嘉泰姆

tectuiQN嘉泰姆

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PWMiQN嘉泰姆

OutputiQN嘉泰姆

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(A) iQN嘉泰姆

InputiQN嘉泰姆

Voltage (V) iQN嘉泰姆

ReferenceiQN嘉泰姆

VoltageiQN嘉泰姆

(V) iQN嘉泰姆

Bias iQN嘉泰姆

VoltageiQN嘉泰姆

(V) iQN嘉泰姆

QuiescentiQN嘉泰姆

CurrentiQN嘉泰姆

(uA) iQN嘉泰姆

miniQN嘉泰姆

maxiQN嘉泰姆

CXSD6273iQN嘉泰姆

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QSOP-16iQN嘉泰姆

QFN4x4-16iQN嘉泰姆

VM    iQN嘉泰姆

1   iQN嘉泰姆

1     iQN嘉泰姆

30iQN嘉泰姆

2.9    iQN嘉泰姆

13.2iQN嘉泰姆

0.9iQN嘉泰姆

12     iQN嘉泰姆

8000iQN嘉泰姆

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1iQN嘉泰姆

1iQN嘉泰姆

20iQN嘉泰姆

2.9  iQN嘉泰姆

13.2 iQN嘉泰姆

0.8iQN嘉泰姆

12iQN嘉泰姆

5000iQN嘉泰姆

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60iQN嘉泰姆

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5000iQN嘉泰姆

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20iQN嘉泰姆

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CXSD6277/A/BiQN嘉泰姆

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VMiQN嘉泰姆

1iQN嘉泰姆

1iQN嘉泰姆

5iQN嘉泰姆

5iQN嘉泰姆

13.2iQN嘉泰姆

1.25|0.8iQN嘉泰姆

5~12iQN嘉泰姆

3000iQN嘉泰姆

CXSD6278iQN嘉泰姆

SOP-8iQN嘉泰姆

VMiQN嘉泰姆

1iQN嘉泰姆

1iQN嘉泰姆

10iQN嘉泰姆

3.3iQN嘉泰姆

5.5iQN嘉泰姆

0.8iQN嘉泰姆

5iQN嘉泰姆

2100iQN嘉泰姆

CXSD6279BiQN嘉泰姆

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1iQN嘉泰姆

10iQN嘉泰姆

5iQN嘉泰姆

13.2iQN嘉泰姆

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2000iQN嘉泰姆

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TSSOP-24iQN嘉泰姆

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VMiQN嘉泰姆

1iQN嘉泰姆

2iQN嘉泰姆

20iQN嘉泰姆

5iQN嘉泰姆

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0.6iQN嘉泰姆

5~12iQN嘉泰姆

4000iQN嘉泰姆

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4000iQN嘉泰姆

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