CXSD6280两个同步降压型脉宽调制控制器高精度内部参考电压的线性控制器PWM控制器同步buck拓扑中的两个N沟道mosfet

发布时间:2020-04-21 16:27:33 浏览次数:336 作者:oumao18 来源:嘉泰姆
摘要:CXSD6280PWM控制器设计用于驱动同步buck拓扑中的两个N沟道mosfet,以及控制器驱动外部N沟道MOSFET。设备要求12V和5V电源,如果5V电源不可用,VCC12可以为5V电源提供可选的5.8V并联调节器。所有输出都有通过SS/EN引脚控制独立软启动和启用功能。将每个SS/EN引脚的电容器接地,以设置软启动时间,将SS/EN引脚拉到1V以下以禁用调节器
CXSD6280两个同步降压型脉宽调制控制器高精度内部参考电压的线性控制器PWM控制器同步buck拓扑中的两个N沟道mosfet

目录XZI嘉泰姆

1.产品概述                       2.产品特点XZI嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 XZI嘉泰姆
5.产品封装图                     6.电路原理图                   XZI嘉泰姆
7.功能概述                        8.相关产品XZI嘉泰姆

一,产品概述(General Description)         XZI嘉泰姆


          The CXSD6280 has two synchronous buck PWM control-lersXZI嘉泰姆
and one linear controller with high precision internal references voltageXZI嘉泰姆
to offer accurate outputs. The PWM controllers are designed to driveXZI嘉泰姆
two N-channel MOSFETs in synchronous buck topology, and the linearXZI嘉泰姆
controller drives an external N-channel MOSFET. The device re-quiresXZI嘉泰姆
12V and 5V power supplies, if the 5V supply is not available, VCC12 canXZI嘉泰姆
offer an optional shunt regulator 5.8V for 5V supply.All outputs haveXZI嘉泰姆
independent soft-start and enable func-tions by SS/EN pins to control.XZI嘉泰姆
Connect a capacitor from each SS/EN pin to the ground for setting theXZI嘉泰姆
soft-start time, and pulling the SS/EN pin below 1V to disable regulator.XZI嘉泰姆
Pull the SS2/EN2 to VCC, enter the DDR mode,the SS1/EN1 controlsXZI嘉泰姆
both VOUT1 and VOUT2, and al-lows VOUT2 to track VOUT1. It alsoXZI嘉泰姆
offers the phase shift function by REFOUT pin to select the phase shiftXZI嘉泰姆
between VOUT1 and VOUT2 in DDR mode or Independent mode.XZI嘉泰姆
When all SS/EN pins exceed 3.3V and no faults are detected, the PGOODXZI嘉泰姆
pin goes high to indicate the regu-lators are ready. If any of the SS/EN pinsXZI嘉泰姆
goes below 3.2V or any of the outputs has a fault condition, the PGOOD pinXZI嘉泰姆
will be pulled low.XZI嘉泰姆
     The internal oscillator is nominally 300kHz (keep the FS/SYNC pin openXZI嘉泰姆
or short to GND), and it offers the pro-grammable frequency function fromXZI嘉泰姆
70kHz to 800kHz; con-necting a resistor from FS/SYNC to VCC12 to decreaseXZI嘉泰姆
the frequency, conversely, connect a resistor from FS/SYNC to GND toXZI嘉泰姆
increase the frequency.The IC also pro-vides the synchronous frequencyXZI嘉泰姆
function. Connect the LGATE signal of another converter to FS/SYNC pin;XZI嘉泰姆
forc-ing the switching frequency to follow the external clock.
         The possible synchronous frequency is from 150kHz to 800kHz. ThereXZI嘉泰姆
is no Rds(on) sensing or under-voltage sens-ing on CXSD6280. However, itXZI嘉泰姆
provides a simple short-circuit protection by monitoring the COMP1 and COMP2XZI嘉泰姆
for over-voltage. When any of two pins exceeds their trip point and the conditionXZI嘉泰姆
persists for 1-2 internal clock cycle (3-6μs at 300kHz), then it will shut downXZI嘉泰姆
all regulators.XZI嘉泰姆
二.产品特点(Features)XZI嘉泰姆


1.)Two Synchronous Buck Converters and A Linear RegulatorXZI嘉泰姆
2.)VIN Range up to 12VXZI嘉泰姆
3.)Input Power Supplies Require 12V and 5V orXZI嘉泰姆
4.)Use 12V to Generate a Shunt Regulator 5.8VXZI嘉泰姆
5.)0.6V Reference for VOUT1 and VOUT3 with 0.8% AccurateXZI嘉泰姆
6.)3.3V Reference for VOUT2 with 0.8% AccurateXZI嘉泰姆
7.)Buffered VTT Reference OutputXZI嘉泰姆
8.)Three Outputs have Independent Soft-Start and EnableXZI嘉泰姆
9.)Internal 300kHz Oscillator and ProgrammableXZI嘉泰姆
10.)Frequency Range from 70 kHz to 800kHzXZI嘉泰姆
11.)Synchronous Switching FrequencyXZI嘉泰姆
12.)DDR Mode or Independent Mode SelectionXZI嘉泰姆
13.)Phase Shift SelectionXZI嘉泰姆
14.)Power Good FunctionXZI嘉泰姆

15.)Short-Circuit Protection for VOUT1 and VOUT2XZI嘉泰姆
16.)Thermally Enhanced TSSOP-24P and QFN5x5-32 PackagesXZI嘉泰姆
17.)Lead Free and Green Devices Available (RoHS Compliant) XZI嘉泰姆
三,应用范围 (Applications)XZI嘉泰姆


Graphic CardsXZI嘉泰姆
DDR memory Power SuppliesXZI嘉泰姆
Low-Voltage Distributed Power SuppliesXZI嘉泰姆
四.下载产品资料PDF文档 XZI嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持XZI嘉泰姆

 QQ截图20160419174301.jpgXZI嘉泰姆

五,产品封装图 (Package)XZI嘉泰姆


XZI嘉泰姆
FUNCTIONNAMEFUNCTIONXZI嘉泰姆
These pins are the outputs of error amplifiers of their respective regulators. They areXZI嘉泰姆
used to set the compensation components.XZI嘉泰姆
These pins provide two functions. Connect a capacitor to the GND for setting theXZI嘉泰姆
soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable theXZI嘉泰姆
respective output, leave open to enable the respective output.XZI嘉泰姆
These pins provide two functions. Connect a capacitor to the GND for setting theXZI嘉泰姆
soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable theXZI嘉泰姆
respective output, leave open to enable the respective output.XZI嘉泰姆

PINXZI嘉泰姆

FUNCTIONXZI嘉泰姆

NO.XZI嘉泰姆

NAMEXZI嘉泰姆

TSSOP-24PXZI嘉泰姆

DFN5x5-32XZI嘉泰姆

       

1XZI嘉泰姆

29XZI嘉泰姆

FB1XZI嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.XZI嘉泰姆

2XZI嘉泰姆

30XZI嘉泰姆

COMP1XZI嘉泰姆

These pins are the outputs of error amplifiers of their respective regulators. They are used to set the compensation components.XZI嘉泰姆

3XZI嘉泰姆

31XZI嘉泰姆

COMP2XZI嘉泰姆

4XZI嘉泰姆

32XZI嘉泰姆

FB2XZI嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.XZI嘉泰姆

5XZI嘉泰姆

1XZI嘉泰姆

REFINXZI嘉泰姆

This pin is the reference input voltage of error amplifier of the VOUT2. It also provides the voltage into a buffer, which is out on the REFOUT pin.XZI嘉泰姆

6XZI嘉泰姆

3XZI嘉泰姆

REFOUTXZI嘉泰姆

This pin provides a buffed voltage, which is from REFIN pin. In Independent mode, it can be used by other ICs. In DDR mode, it is from the VOUT1, and can be used as the VTT buffer. This pin also uses to select the phase shift (see table1). When this pinXZI嘉泰姆
pulls to VCC, the buffer is disabled and the REFOUT is not available for use. It is recommended that a 0.1μF capacitor is connected to the ground for stability.XZI嘉泰姆

7XZI嘉泰姆

4XZI嘉泰姆

SS1/EN1XZI嘉泰姆

These pins provide two functions. Connect a capacitor to the GND for setting the soft-start time. Use an open drain logic signal to pull the SS/EN pin low to disable the respective output, leave open to enable the respective output.XZI嘉泰姆

8XZI嘉泰姆

5XZI嘉泰姆

SS2/EN2XZI嘉泰姆

9XZI嘉泰姆

6XZI嘉泰姆

SS3/EN3XZI嘉泰姆

10XZI嘉泰姆

7XZI嘉泰姆

VREFXZI嘉泰姆

This pin provides a 3.3V reference voltage, which can be used by the REFIN pin or other ICs as a voltage reference. It is recommended that a 1μF capacitor is connected to ground for stabilityXZI嘉泰姆

11XZI嘉泰姆

8XZI嘉泰姆

DRIVE3XZI嘉泰姆

This pin drives the gate of an external N-channel MOSFET for linear regulator.XZI嘉泰姆

12XZI嘉泰姆

10XZI嘉泰姆

FB3XZI嘉泰姆

These pins are the inverting inputs of the error amplifiers of their respective regulators. They are used to set the output voltage and the compensation components.XZI嘉泰姆

13XZI嘉泰姆

11XZI嘉泰姆

FS/SYNCXZI嘉泰姆

This pin is used to adjust the switching frequency. Connecting a resistor from FS/SYNC pin to the ground increases the switching frequency. Conversely,connecting a resistor from this pin to the VCC12 reduces the switching frequency. In addition, this pin also provides synchronous frequency function. An external clock can be fed into this pin, and force the switching frequency to follow the external clock.XZI嘉泰姆

14XZI嘉泰姆

12XZI嘉泰姆

PGOODXZI嘉泰姆

This pin is an open drain device; connect a pull up resistor to the VCC for PGOOD function.XZI嘉泰姆

15XZI嘉泰姆

13XZI嘉泰姆

GNDXZI嘉泰姆

This pin is the signal ground pin. The metal thermal pad under the package is the IC substrate; connects the GND pin and metal thermal pad together on the board, and ties to the good GND plane for electrical and thermal conduction.XZI嘉泰姆

16XZI嘉泰姆

16XZI嘉泰姆

BOOT2XZI嘉泰姆

These pins provide the bootstrap voltage to the gate driver for driving the upper MOSFETs. It can be connected to a power voltage directly, but the difference voltage between the BOOT and VIN must be high enough to drive the upper MOSFETs.XZI嘉泰姆

17XZI嘉泰姆

14XZI嘉泰姆

UGATE2XZI嘉泰姆

These pins provide the gate driver for the upper MOSFETs of VOUT1 and VOUT2.XZI嘉泰姆

18XZI嘉泰姆

18,23XZI嘉泰姆

PGNDXZI嘉泰姆

This pin is the power ground pin for the gate driver and linear driver circuit. It should be tied to the GND.XZI嘉泰姆

19XZI嘉泰姆

20XZI嘉泰姆

LGATE2XZI嘉泰姆

These pins provide the gate driver for the lower MOSFETs of VOUT1 and VOUT2.XZI嘉泰姆

20XZI嘉泰姆

21XZI嘉泰姆

LGATE1XZI嘉泰姆

These pins provide the gate driver for the lower MOSFETs of VOUT1 and VOUT2.XZI嘉泰姆

21XZI嘉泰姆

19, 22XZI嘉泰姆

VCC12XZI嘉泰姆

Power supply input pin. Connect a nominal 12V power supply to this pin for the gate driver. It is recommended that a decoupling capacitor (1 to 10μF) is connected to the GND for noise decoupling.XZI嘉泰姆

六.电路原理图XZI嘉泰姆


blob.pngXZI嘉泰姆

七,功能概述XZI嘉泰姆


Soft-Start/EnableXZI嘉泰姆
The three SS/EN pins control the soft-start and enable or disable the controller. In Independent mode, the threeXZI嘉泰姆
regulators all have independent soft-start and enable functions. Connect a soft-start capacitor from each SS/ENXZI嘉泰姆
pin to the GND to set the soft-start interval, and an open drain logic signal for each SS/EN pin will enable or dis-XZI嘉泰姆
able the respective output.XZI嘉泰姆

八,相关产品            更多同类产品......  XZI嘉泰姆


Switching Regulator >   Buck ControllerXZI嘉泰姆

Part_No XZI嘉泰姆

Package XZI嘉泰姆

ArchiXZI嘉泰姆

tectuXZI嘉泰姆

PhaseXZI嘉泰姆

No.ofXZI嘉泰姆

PWMXZI嘉泰姆

OutputXZI嘉泰姆

Output XZI嘉泰姆

CurrentXZI嘉泰姆

(A) XZI嘉泰姆

InputXZI嘉泰姆

Voltage (V) XZI嘉泰姆

ReferenceXZI嘉泰姆

VoltageXZI嘉泰姆

(V) XZI嘉泰姆

Bias XZI嘉泰姆

VoltageXZI嘉泰姆

(V) XZI嘉泰姆

QuiescentXZI嘉泰姆

CurrentXZI嘉泰姆

(uA) XZI嘉泰姆

minXZI嘉泰姆

maxXZI嘉泰姆

CXSD6273XZI嘉泰姆

SOP-14XZI嘉泰姆

QSOP-16XZI嘉泰姆

QFN4x4-16XZI嘉泰姆

VM    XZI嘉泰姆

1   XZI嘉泰姆

1     XZI嘉泰姆

30XZI嘉泰姆

2.9    XZI嘉泰姆

13.2XZI嘉泰姆

0.9XZI嘉泰姆

12     XZI嘉泰姆

8000XZI嘉泰姆

CXSD6274XZI嘉泰姆

SOP-8XZI嘉泰姆

VM   XZI嘉泰姆

1XZI嘉泰姆

1XZI嘉泰姆

20XZI嘉泰姆

2.9  XZI嘉泰姆

13.2 XZI嘉泰姆

0.8XZI嘉泰姆

12XZI嘉泰姆

5000XZI嘉泰姆

CXSD6274CXZI嘉泰姆

SOP-8XZI嘉泰姆

VMXZI嘉泰姆

1XZI嘉泰姆

1XZI嘉泰姆

20XZI嘉泰姆

2.9XZI嘉泰姆

13.2XZI嘉泰姆

0.8XZI嘉泰姆

12XZI嘉泰姆

5000XZI嘉泰姆

CXSD6275XZI嘉泰姆

QFN4x4-24XZI嘉泰姆

VMXZI嘉泰姆

2XZI嘉泰姆

1XZI嘉泰姆

60XZI嘉泰姆

3.1XZI嘉泰姆

13.2XZI嘉泰姆

0.6XZI嘉泰姆

12XZI嘉泰姆

5000XZI嘉泰姆

CXSD6276XZI嘉泰姆

SOP-8XZI嘉泰姆

VMXZI嘉泰姆

1XZI嘉泰姆

1XZI嘉泰姆

20XZI嘉泰姆

2.2XZI嘉泰姆

13.2XZI嘉泰姆

0.8XZI嘉泰姆

5~12XZI嘉泰姆

2100XZI嘉泰姆

CXSD6276AXZI嘉泰姆

SOP-8XZI嘉泰姆

VMXZI嘉泰姆

1XZI嘉泰姆

1XZI嘉泰姆

20XZI嘉泰姆

2.2XZI嘉泰姆

13.2XZI嘉泰姆

0.8XZI嘉泰姆

5~12XZI嘉泰姆

2100XZI嘉泰姆

CXSD6277/A/BXZI嘉泰姆

SOP8|TSSOP8XZI嘉泰姆

VMXZI嘉泰姆

1XZI嘉泰姆

1XZI嘉泰姆

5XZI嘉泰姆

5XZI嘉泰姆

13.2XZI嘉泰姆

1.25|0.8XZI嘉泰姆

5~12XZI嘉泰姆

3000XZI嘉泰姆

CXSD6278XZI嘉泰姆

SOP-8XZI嘉泰姆

VMXZI嘉泰姆

1XZI嘉泰姆

1XZI嘉泰姆

10XZI嘉泰姆

3.3XZI嘉泰姆

5.5XZI嘉泰姆

0.8XZI嘉泰姆

5XZI嘉泰姆

2100XZI嘉泰姆

CXSD6279BXZI嘉泰姆

SOP-14XZI嘉泰姆

VM   XZI嘉泰姆

1XZI嘉泰姆

1XZI嘉泰姆

10XZI嘉泰姆

5XZI嘉泰姆

13.2XZI嘉泰姆

0.8XZI嘉泰姆

12XZI嘉泰姆

2000XZI嘉泰姆

CXSD6280XZI嘉泰姆

TSSOP-24XZI嘉泰姆

|QFN5x5-32XZI嘉泰姆

VMXZI嘉泰姆

1XZI嘉泰姆

2XZI嘉泰姆

20XZI嘉泰姆

5XZI嘉泰姆

13.2XZI嘉泰姆

0.6XZI嘉泰姆

5~12XZI嘉泰姆

4000XZI嘉泰姆

CXSD6281NXZI嘉泰姆

SOP14XZI嘉泰姆

QSOP16XZI嘉泰姆

QFN-16XZI嘉泰姆

VMXZI嘉泰姆

1XZI嘉泰姆

1XZI嘉泰姆

30XZI嘉泰姆

2.9XZI嘉泰姆

13.2XZI嘉泰姆

0.9XZI嘉泰姆

12XZI嘉泰姆

4000XZI嘉泰姆

CXSD6282XZI嘉泰姆

SOP-14XZI嘉泰姆

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1XZI嘉泰姆

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