目录
产品概述 返回TOPEuQ嘉泰姆
The CX8PE53B is a low-cost, high speed, high noise immunity, OTP-based 8-bit CMOS microcontrollers. Itemploys a RISC architecture with only 42 instructions. All instructions are single cycle except for programbranches which take two cycles. The easy to use and easy to remember instruction set reduces developmenttime significantly.EuQ嘉泰姆
The CX8PE53B consists of Power-on Reset (POR), Brown-out Reset (BOR), Power-up Reset Timer (PWRT),Oscillator Start-up Timer(OST), Watchdog Timer, OTP, SRAM, tri-state I/O port, I/O pull-high/open-drain/pull-down control, Power saving SLEEP mode, real time programmable clock/counter, Interrupt, Wake-up from SLEEPmode, and Code Protection for OTP products. There are three oscillator configurations to choose from, includingthe power-saving LF (Low Frequency) oscillator and cost saving RC oscillator.EuQ嘉泰姆
The CX8PE53B address 1K×13 of program memory.EuQ嘉泰姆
The CX8PE53B can directly or indirectly address its register files and data memory. All special function registers including the program counter are mapped in the data memory.EuQ嘉泰姆
产品特点 返回TOPEuQ嘉泰姆
8-bit real time clock/counter with 8-bit programmable prescaler
‧ On chip Watchdog Timer (WDT) with internal oscillator for reliable operation
and soft-ware watch-dog enable/disable control
‧ 2 I/O ports with independent direction control
‧ Soft-ware I/O pull-high/pull-down or open-drain control
‧ 1 internal interrupt source; 2 external interrupt source
‧ Wake-up from SLEEP mode
‧ Built-in 8MHz, 4MHz, 1MHz, and 455KHz internal RC oscillator
‧ Operating voltage range: 1.8V to 3.5VEuQ嘉泰姆
应用范围 返回TOPEuQ嘉泰姆
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技术规格书（产品PDF) 返回TOP EuQ嘉泰姆
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产品封装图 返回TOPEuQ嘉泰姆
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电路原理图 返回TOPEuQ嘉泰姆
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GPIOEuQ嘉泰姆 |
Product NameEuQ嘉泰姆 | ROMEuQ嘉泰姆 | RAMEuQ嘉泰姆 | I/OEuQ嘉泰姆 | Ext. EuQ嘉泰姆 | Int.EuQ嘉泰姆 | Wake upEuQ嘉泰姆 | StackEuQ嘉泰姆 | TimerEuQ嘉泰姆 | PWM /EuQ嘉泰姆 | ADCEuQ嘉泰姆 | LCDEuQ嘉泰姆 | InterfaceEuQ嘉泰姆 | IRCEuQ嘉泰姆 | PackageEuQ嘉泰姆 | StatusEuQ嘉泰姆 |
| (Word)EuQ嘉泰姆 | (Byte)EuQ嘉泰姆 |
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CX8P51EuQ嘉泰姆 | 4K(MASK ROM)EuQ嘉泰姆 | 140EuQ嘉泰姆 | 38EuQ嘉泰姆 | 1EuQ嘉泰姆 | 7EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*4EuQ嘉泰姆 | 10bit PWM*2EuQ嘉泰姆 | 15bit RFC*19EuQ嘉泰姆 | NoEuQ嘉泰姆 | SPIEuQ嘉泰姆 | NoEuQ嘉泰姆 | DIP40/QFP44EuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8P59EuQ嘉泰姆 | 4(MASK ROM)EuQ嘉泰姆 | 144EuQ嘉泰姆 | 24EuQ嘉泰姆 | 2EuQ嘉泰姆 | 1EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*1EuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | YesEuQ嘉泰姆 | DIO/SOPEuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8PE51EEuQ嘉泰姆 | 4K(OTP)EuQ嘉泰姆 | 140EuQ嘉泰姆 | 38EuQ嘉泰姆 | 1EuQ嘉泰姆 | 7EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*4EuQ嘉泰姆 | 10bit PWM*2PWM*2EuQ嘉泰姆 | 15bit RFC*19EuQ嘉泰姆 | NoEuQ嘉泰姆 | SPIEuQ嘉泰姆 | NoEuQ嘉泰姆 | DIP40/QFP44EuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8PE56EEuQ嘉泰姆 | 1K(OTP)EuQ嘉泰姆 | 49EuQ嘉泰姆 | 16EuQ嘉泰姆 | 2EuQ嘉泰姆 | 1EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*1EuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | YesEuQ嘉泰姆 | DIP/SOP18/SSOP20EuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8PE55EEuQ嘉泰姆 | 512(OTP)EuQ嘉泰姆 | 48EuQ嘉泰姆 | 20EuQ嘉泰姆 | 1EuQ嘉泰姆 | 1EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*1EuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | YesEuQ嘉泰姆 | DIP/SOP/SSOP28EuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8PE57EEuQ嘉泰姆 | 2K(OTP)EuQ嘉泰姆 | 96EuQ嘉泰姆 | 20EuQ嘉泰姆 | 1EuQ嘉泰姆 | 1EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*1EuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | YesEuQ嘉泰姆 | DIP/SOP/SSOP28EuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8PE59EEuQ嘉泰姆 | 4K(OTP)EuQ嘉泰姆 | 144EuQ嘉泰姆 | 24EuQ嘉泰姆 | 2EuQ嘉泰姆 | 4EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*2EuQ嘉泰姆 | IROUTEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | SPIEuQ嘉泰姆 | YesEuQ嘉泰姆 | DIP/SOP/SSOP2EuQ嘉泰姆 8/DIP/SOP32EuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8PB53BEuQ嘉泰姆 | 1K(OTP)EuQ嘉泰姆 | 49EuQ嘉泰姆 | 12EuQ嘉泰姆 | 2EuQ嘉泰姆 | 1EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*1EuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | YesEuQ嘉泰姆 | DIP14/SOP14EuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8PB56BEuQ嘉泰姆 | 1KEuQ嘉泰姆 | 49EuQ嘉泰姆 | 16EuQ嘉泰姆 | 2EuQ嘉泰姆 | 1EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*1EuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | YesEuQ嘉泰姆 | DIP/SOP18EuQ嘉泰姆 | MPEuQ嘉泰姆 |
CX8PE53BEuQ嘉泰姆 | 1K(OTP)EuQ嘉泰姆 | 49EuQ嘉泰姆 | 12EuQ嘉泰姆 | 2EuQ嘉泰姆 | 1EuQ嘉泰姆 | YesEuQ嘉泰姆 | 5EuQ嘉泰姆 | 8bit*1EuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | NoEuQ嘉泰姆 | YesEuQ嘉泰姆 | DEuQ嘉泰姆 |
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