目录
产品概述 返回TOPd05嘉泰姆
The CXLC8977 CXLC8978 consists of 12+1 channel buffers target
toward the needs of thin film transistor liquid crystal
display (TFT LCD). This device incorporates one
Vcom buffer and 12 gamma buffers, and is programmed
through I2
C interface. It contains two register
banks which can store two different sets of gamma
and VCOM values. Each buffer is capable of driving
heavy capacitive loads and offering large current loading
(Vcom: 100mA, Gammas: 25mA).
The CXLC8977 CXLC8978 is available in the QFN4X4-24 package.
产品特点 返回TOPd05嘉泰姆
„ Supply Operation Range : 7V to 20V d05嘉泰姆
„ 12+1 Channels : d05嘉泰姆
--- 12 Channel Rail-to-Rail Programmable
Gamma Buffers d05嘉泰姆
Š 10 bits Resolution for each Channel d05嘉泰姆
Š 25mA Output Current for each Channel d05嘉泰姆
---1 Channel Rail-to-Rail Vcom Buffer: d05嘉泰姆
Š 10 Bits Adjustable Output d05嘉泰姆
Š ±100mA Output Current d05嘉泰姆
Š ±300mA Output Short-Circuit Current d05嘉泰姆
Š 50V/μs Slew Rate d05嘉泰姆
Š Programmable VCOM Limits d05嘉泰姆
---2 Banks Registers Using BKSEL to Select
which Bank Data Output d05嘉泰姆
„ 2-Wire I2
C Slave Mode Interface d05嘉泰姆
„ Non-Volatile Memory (NVM) Store Setting (at
Least 100 Re-Write Times) d05嘉泰姆
„ QFN4X4-24 Packaged05嘉泰姆
应用范围 返回TOPd05嘉泰姆
„ TFT-LCD Monitors d05嘉泰姆
„ LCD Televisionsd05嘉泰姆
技术规格书（产品PDF) 返回TOP d05嘉泰姆
需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持</span>！</span>
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产品封装图 返回TOPd05嘉泰姆
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电路原理图 返回TOPd05嘉泰姆
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ntegrated Bufferd05嘉泰姆 |
Part NO.d05嘉泰姆 | VDDd05嘉泰姆 (V)d05嘉泰姆 mind05嘉泰姆 | VDD d05嘉泰姆 (V)d05嘉泰姆 maxd05嘉泰姆 | CH d05嘉泰姆 Vr+d05嘉泰姆 Vcomd05嘉泰姆 | IOUTd05嘉泰姆 (mA) d05嘉泰姆 Vr,Vcomd05嘉泰姆 | S/R d05嘉泰姆 (V/μs）</span>d05嘉泰姆 Vr,Vcomd05嘉泰姆 | BW (MHz）</span>d05嘉泰姆 Vr,Vcomd05嘉泰姆 | ISC (mA)d05嘉泰姆 Vr,Vcomd05嘉泰姆 | Noted05嘉泰姆 | Packaged05嘉泰姆 |
CXLC8973d05嘉泰姆 | 6.5d05嘉泰姆 | 18d05嘉泰姆 | 1d05嘉泰姆 | 100d05嘉泰姆 | 20d05嘉泰姆 | 19d05嘉泰姆 | 260d05嘉泰姆 | SMBus, Rail-to-Rail Outputd05嘉泰姆 | TDFN3X3-10d05嘉泰姆 |
CXLC8974d05嘉泰姆 | 9d05嘉泰姆 | 20d05嘉泰姆 | 14+1d05嘉泰姆 | 25, 100d05嘉泰姆 | 16, 70d05嘉泰姆 | 10, 19d05嘉泰姆 | 100, 260d05嘉泰姆 | Rail-to-Rail Output, d05嘉泰姆 SMBus,2 Banks MTPd05嘉泰姆 | QFN5X5-32d05嘉泰姆 |
CXLC8975d05嘉泰姆 | 6.5d05嘉泰姆 | 19.5d05嘉泰姆 | 18+1d05嘉泰姆 | 30, 100d05嘉泰姆 | 16, 80d05嘉泰姆 | 9, 15d05嘉泰姆 | 120, 300d05嘉泰姆 | Rail-to-Rail Outputd05嘉泰姆 | TQFP7X7-48/(FD)d05嘉泰姆 |
CXLC8976d05嘉泰姆 | 6.5d05嘉泰姆 | 19.5d05嘉泰姆 | 14+1d05嘉泰姆 | 30, 100d05嘉泰姆 | 16, 80d05嘉泰姆 | 9, 15d05嘉泰姆 | 120, 300d05嘉泰姆 | Rail-to-Rail Outputd05嘉泰姆 | TQFP7X7-48/(FD)d05嘉泰姆 |
CXLC8977d05嘉泰姆 | 7d05嘉泰姆 | 20d05嘉泰姆 | 12+1d05嘉泰姆 | 25, 100d05嘉泰姆 | 16, 50d05嘉泰姆 | 30d05嘉泰姆 | 100, 300d05嘉泰姆 | Rail-to-Rail Output, d05嘉泰姆 SMBus,2 Banks REGd05嘉泰姆 | QFN4X4-24d05嘉泰姆 |
CXLC8978d05嘉泰姆 | 7d05嘉泰姆 | 20d05嘉泰姆 | 16+2d05嘉泰姆 | 25, 100d05嘉泰姆 | 16, 50d05嘉泰姆 | 30d05嘉泰姆 | 100, 300d05嘉泰姆 | Rail-to-Rail Output,d05嘉泰姆 SMBus,2 Banks MTPd05嘉泰姆 | QFN5X5-28d05嘉泰姆 |
CXLC8979d05嘉泰姆 | 7d05嘉泰姆 | 20d05嘉泰姆 | 12+1+1d05嘉泰姆 | 25, 100d05嘉泰姆 | 16, 50d05嘉泰姆 | 30d05嘉泰姆 | 100, 300d05嘉泰姆 | Rail-to-Rail Output, SMBus,Banks MTP, CRCd05嘉泰姆 | QFN4X4-24d05嘉泰姆 |
CXLC8980d05嘉泰姆 | 6.5d05嘉泰姆 | 18d05嘉泰姆 | 14+1d05嘉泰姆 | 25, 100d05嘉泰姆 | 20, 20d05嘉泰姆 | 10, 20d05嘉泰姆 | 75, 140d05嘉泰姆 | Rail-to-Rail Output,SMBusd05嘉泰姆 ,2 Banks MTP, Checksumd05嘉泰姆 | TQFN5X5-32d05嘉泰姆 |
CXLC8981d05嘉泰姆 | 7d05嘉泰姆 | 18d05嘉泰姆 | 1d05嘉泰姆 | 100d05嘉泰姆 | 23d05嘉泰姆 | 20d05嘉泰姆 | 270d05嘉泰姆 | SMBus,Rail-to-Rail Outputd05嘉泰姆 | TDFN3X3-8d05嘉泰姆 |
CXLC8982d05嘉泰姆 | 7d05嘉泰姆 | 18d05嘉泰姆 | 1d05嘉泰姆 | 100d05嘉泰姆 | --d05嘉泰姆 | --d05嘉泰姆 | --d05嘉泰姆 | SMBus, VCOM REFd05嘉泰姆 | TDFN3X3-8d05嘉泰姆 |
CXLC8983d05嘉泰姆 | 7d05嘉泰姆 | 20d05嘉泰姆 | 8+1d05嘉泰姆 | 25, 100d05嘉泰姆 | 16, 50d05嘉泰姆 | 30d05嘉泰姆 | 100, 300d05嘉泰姆 | SMBus, Rail-to-Rail d05嘉泰姆 Output,2 Bank MTPd05嘉泰姆 | QFN4X4-24d05嘉泰姆 |
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