目录
产品概述 返回TOPK5I嘉泰姆
The CXLC8980 consists of 14+1 channel buffers target
toward the needs of thin film transistor liquid crystal
display (TFT LCD). This device incorporates one
Vcom buffer and 14 gamma buffers, and are programmed
through I2
C interface. It contains two register
banks which can store two different sets of gamma
reference values. Each buffer is capable of driving
heavy capacitive loads and offering large current loading
(Vcom: 100mA, Gammas: 25mA).
The CXLC8980 is available in the TQFN5X5-32 package.
产品特点 返回TOPK5I嘉泰姆
„ Supply Operation Range : 6.5V to 18VK5I嘉泰姆
„ 14+1 Channels : K5I嘉泰姆
--- 14 Channel Rail-to-Rail Programmable
Gamma Buffers K5I嘉泰姆
Š 10 bits Resolution for each Channel K5I嘉泰姆
Š 25mA Output Current for each Channel K5I嘉泰姆
Š 2 Banks Registers Using Bank_Sel to Select
which Bank Data Output K5I嘉泰姆
---1 Channel Rail-to-Rail Vcom Buffer: K5I嘉泰姆
Š 7 Bits Adjustable Output K5I嘉泰姆
Š ±100mA Output Current K5I嘉泰姆
Š ±140mA Output Short-Circuit Current K5I嘉泰姆
Š 20V/μs Slew Rate K5I嘉泰姆
„ 2-Wire I2
C Slave Mode InterfaceK5I嘉泰姆
„ Using One Control Pin Enable to Store Data into
Non-Volatile Memory (NVM) K5I嘉泰姆
„ Non-Volatile Memory (NVM) Store Setting
(at Least 100 Re-Write Times) K5I嘉泰姆
„ TQFN5X5-32 PackageK5I嘉泰姆
应用范围 返回TOPK5I嘉泰姆
TFT-LCD Monitors K5I嘉泰姆
„ LCD TelevisionsK5I嘉泰姆
技术规格书（产品PDF) 返回TOP K5I嘉泰姆
需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持</span>！</span>
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产品封装图 返回TOPK5I嘉泰姆
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电路原理图 返回TOPK5I嘉泰姆
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ntegrated BufferK5I嘉泰姆 |
Part NO.K5I嘉泰姆 | VDDK5I嘉泰姆 (V)K5I嘉泰姆 minK5I嘉泰姆 | VDD K5I嘉泰姆 (V)K5I嘉泰姆 maxK5I嘉泰姆 | CH K5I嘉泰姆 Vr+K5I嘉泰姆 VcomK5I嘉泰姆 | IOUTK5I嘉泰姆 (mA) K5I嘉泰姆 Vr,VcomK5I嘉泰姆 | S/R K5I嘉泰姆 (V/μs）</span>K5I嘉泰姆 Vr,VcomK5I嘉泰姆 | BW (MHz）</span>K5I嘉泰姆 Vr,VcomK5I嘉泰姆 | ISC (mA)K5I嘉泰姆 Vr,VcomK5I嘉泰姆 | NoteK5I嘉泰姆 | PackageK5I嘉泰姆 |
CXLC8973K5I嘉泰姆 | 6.5K5I嘉泰姆 | 18K5I嘉泰姆 | 1K5I嘉泰姆 | 100K5I嘉泰姆 | 20K5I嘉泰姆 | 19K5I嘉泰姆 | 260K5I嘉泰姆 | SMBus, Rail-to-Rail OutputK5I嘉泰姆 | TDFN3X3-10K5I嘉泰姆 |
CXLC8974K5I嘉泰姆 | 9K5I嘉泰姆 | 20K5I嘉泰姆 | 14+1K5I嘉泰姆 | 25, 100K5I嘉泰姆 | 16, 70K5I嘉泰姆 | 10, 19K5I嘉泰姆 | 100, 260K5I嘉泰姆 | Rail-to-Rail Output, K5I嘉泰姆 SMBus,2 Banks MTPK5I嘉泰姆 | QFN5X5-32K5I嘉泰姆 |
CXLC8975K5I嘉泰姆 | 6.5K5I嘉泰姆 | 19.5K5I嘉泰姆 | 18+1K5I嘉泰姆 | 30, 100K5I嘉泰姆 | 16, 80K5I嘉泰姆 | 9, 15K5I嘉泰姆 | 120, 300K5I嘉泰姆 | Rail-to-Rail OutputK5I嘉泰姆 | TQFP7X7-48/(FD)K5I嘉泰姆 |
CXLC8976K5I嘉泰姆 | 6.5K5I嘉泰姆 | 19.5K5I嘉泰姆 | 14+1K5I嘉泰姆 | 30, 100K5I嘉泰姆 | 16, 80K5I嘉泰姆 | 9, 15K5I嘉泰姆 | 120, 300K5I嘉泰姆 | Rail-to-Rail OutputK5I嘉泰姆 | TQFP7X7-48/(FD)K5I嘉泰姆 |
CXLC8977K5I嘉泰姆 | 7K5I嘉泰姆 | 20K5I嘉泰姆 | 12+1K5I嘉泰姆 | 25, 100K5I嘉泰姆 | 16, 50K5I嘉泰姆 | 30K5I嘉泰姆 | 100, 300K5I嘉泰姆 | Rail-to-Rail Output, K5I嘉泰姆 SMBus,2 Banks REGK5I嘉泰姆 | QFN4X4-24K5I嘉泰姆 |
CXLC8978K5I嘉泰姆 | 7K5I嘉泰姆 | 20K5I嘉泰姆 | 16+2K5I嘉泰姆 | 25, 100K5I嘉泰姆 | 16, 50K5I嘉泰姆 | 30K5I嘉泰姆 | 100, 300K5I嘉泰姆 | Rail-to-Rail Output,K5I嘉泰姆 SMBus,2 Banks MTPK5I嘉泰姆 | QFN5X5-28K5I嘉泰姆 |
CXLC8979K5I嘉泰姆 | 7K5I嘉泰姆 | 20K5I嘉泰姆 | 12+1+1K5I嘉泰姆 | 25, 100K5I嘉泰姆 | 16, 50K5I嘉泰姆 | 30K5I嘉泰姆 | 100, 300K5I嘉泰姆 | Rail-to-Rail Output, SMBus,Banks MTP, CRCK5I嘉泰姆 | QFN4X4-24K5I嘉泰姆 |
CXLC8980K5I嘉泰姆 | 6.5K5I嘉泰姆 | 18K5I嘉泰姆 | 14+1K5I嘉泰姆 | 25, 100K5I嘉泰姆 | 20, 20K5I嘉泰姆 | 10, 20K5I嘉泰姆 | 75, 140K5I嘉泰姆 | Rail-to-Rail Output,SMBusK5I嘉泰姆 ,2 Banks MTP, ChecksumK5I嘉泰姆 | TQFN5X5-32K5I嘉泰姆 |
CXLC8981K5I嘉泰姆 | 7K5I嘉泰姆 | 18K5I嘉泰姆 | 1K5I嘉泰姆 | 100K5I嘉泰姆 | 23K5I嘉泰姆 | 20K5I嘉泰姆 | 270K5I嘉泰姆 | SMBus,Rail-to-Rail OutputK5I嘉泰姆 | TDFN3X3-8K5I嘉泰姆 |
CXLC8982K5I嘉泰姆 | 7K5I嘉泰姆 | 18K5I嘉泰姆 | 1K5I嘉泰姆 | 100K5I嘉泰姆 | --K5I嘉泰姆 | --K5I嘉泰姆 | --K5I嘉泰姆 | SMBus, VCOM REFK5I嘉泰姆 | TDFN3X3-8K5I嘉泰姆 |
CXLC8983K5I嘉泰姆 | 7K5I嘉泰姆 | 20K5I嘉泰姆 | 8+1K5I嘉泰姆 | 25, 100K5I嘉泰姆 | 16, 50K5I嘉泰姆 | 30K5I嘉泰姆 | 100, 300K5I嘉泰姆 | SMBus, Rail-to-Rail K5I嘉泰姆 Output,2 Bank MTPK5I嘉泰姆 | QFN4X4-24K5I嘉泰姆 |
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