EPROM/ROM-Based 8-Bit MicrocontrollerCX8PE59 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 47 i

发布时间:2020-04-06 09:43:38 浏览次数:710 作者:嘉泰姆
摘要:EPROM/ROM-Based 8-Bit MicrocontrollerCX8PE59 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 47 i

目录

   产品概述 返回TOPjE3嘉泰姆


The CX8PE59 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 47 instructions. All instructions are single cycle except for program branches which take two cycles. The easy to use and easy to remember instruction set reduces development time significantly. The CX8PE59 series consists of Power-on Reset (POR), Brown-out Reset (BOR), Power-up Reset Timer (PWRT), Oscillator Start-up Timer(OST), Watchdog Timer, EPROM/ROM, SRAM, tri-state I/O port, I/O pull-high/open-drain/pull-down control, Power saving SLEEP mode, 2 real time programmable clock/counter, Interrupt, IROUT, SPI, Wake-up from SLEEP mode, and Code Protection for EPROM products. There are four oscillator configurations to choose from, including the power-saving LP (Low Power) oscillator and cost saving RC oscillator. The CX8PE59 series address 4K×13 of program memory. The CX8PE59 series can directly or indirectly address its register files and data memory. All special function registers including the program counter are mapped in the data memory.

   产品特点 返回TOPjE3嘉泰姆


   ‧ Only 49 single word instructions jE3嘉泰姆

‧ All instructions are single cycle except for program branches which are two-cycle jE3嘉泰姆

‧ 13-bit wide instructions jE3嘉泰姆

‧ All ROM/EPROM area GOTO/FGOTO instruction jE3嘉泰姆

‧ All ROM/EPROM area subroutine CALL/FCALL instruction jE3嘉泰姆

‧ 8-bit wide data path jE3嘉泰姆

‧ 5-level deep hardware stack jE3嘉泰姆

‧ 4K x 13 bits on chip EPROM/ROM jE3嘉泰姆

‧ 144 x 8 bits on chip general purpose registers (SRAM) jE3嘉泰姆

‧ Operating speed: DC-20 MHz clock input DC-100 ns instruction cyclejE3嘉泰姆

 ‧ Direct, indirect addressing modes for data accessingjE3嘉泰姆

 ‧ One 8-bit real time clock/counter (Timer0) with 8-bit programmable prescaler jE3嘉泰姆

‧ One 8-bit real time clock/counter (Timer1) with 2-bit programmable prescaler and period setting jE3嘉泰姆

‧ Internal Power-on Reset (POR) jE3嘉泰姆

‧ Built-in Low Voltage Detector (LVD) for Brown-out Reset (BOR)jE3嘉泰姆

 ‧ Power-up Reset Timer (PWRT) and Oscillator Start-up Timer(OST)jE3嘉泰姆

 ‧ On chip Watchdog Timer (WDT) with internal oscillator for reliable operation and soft-ware watch-dog enable/disable control jE3嘉泰姆

‧ Three I/O ports IOA, IOB and IOC with independent direction controljE3嘉泰姆

 ‧ 16 soft-ware control pull-high pins: Port B/Port C jE3嘉泰姆

‧ 8 soft-ware control pull-down pins:IOA0~A3/IOB0~B3jE3嘉泰姆

 ‧ 2 soft-ware control open-drain pins: IOC6/IOC7 jE3嘉泰姆

‧ IR output channel with programmable frequency and duty cycle jE3嘉泰姆

‧ Serial Peripheral Interface (SPI) jE3嘉泰姆

‧ Four internal interrupt source: Timer0 overflow, Timer1 match, IROUT, and SPI module; Two external interrupt source: INT0 pin, and INT1 pinjE3嘉泰姆

 ‧ Wake-up from SLEEP by Port B/IOC4/IOC5 input falling jE3嘉泰姆

‧ Power saving SLEEP mode jE3嘉泰姆

‧ Programmable Code Protection jE3嘉泰姆

‧ Selectable oscillator options: jE3嘉泰姆

- ERC: External Resistor/Capacitor Oscillator jE3嘉泰姆

- XT: Crystal/Resonator Oscillator jE3嘉泰姆

- HF: High Frequency Crystal/Resonator Oscillator jE3嘉泰姆

- LF: Low Frequency Crystal Oscillator jE3嘉泰姆

- IRC: Internal Resistor/Capacitor Oscillator jE3嘉泰姆

‧ Wide-operating voltage range: jE3嘉泰姆

- EPROM : 2.3V to 5.5V jE3嘉泰姆

- ROM : 2.3V to 5.5VjE3嘉泰姆

   应用范围 返回TOPjE3嘉泰姆


   ajE3嘉泰姆

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