2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

发布时间:2020-06-08 08:20:13 浏览次数:307 作者:oumao18 来源:嘉泰姆
摘要:CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

目录VnE嘉泰姆

1.产品概述                       2.产品特点VnE嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 VnE嘉泰姆
5.产品封装图                     6.电路原理图                   VnE嘉泰姆
7.功能概述                        8.相关产品VnE嘉泰姆

一,产品概述(General Description)         VnE嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.VnE嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.VnE嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withVnE嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewVnE嘉泰姆
rate. All inputs and outputs are rail-to-rail.VnE嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).VnE嘉泰姆
二.产品特点(Features)VnE嘉泰姆


· 2.6V to 6.5V Input Supply Range VnE嘉泰姆

· Current-Mode Step-Up Regulator VnE嘉泰姆

 - Fast Transient Response VnE嘉泰姆

 - 1.2MHz Fixed Operating Frequency VnE嘉泰姆

· ±1.5% High-Accuracy Output Voltage VnE嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET VnE嘉泰姆

· High Efficiency VnE嘉泰姆

· Low Quiescent Current (0.6mA Typical) VnE嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF VnE嘉泰姆

· High-performance Operational Amplifiers VnE嘉泰姆

 - ±150mA Output Short-Circuit CurrentVnE嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth VnE嘉泰姆

 - Rail-to-Rail Inputs/Outputs VnE嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs VnE嘉泰姆

· Over-Temperature Protection VnE嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) VnE嘉泰姆

· Lead Free Available (RoHS Compliant)VnE嘉泰姆

三,应用范围 (Applications)VnE嘉泰姆


    TFT LCD Displays for MonitorsVnE嘉泰姆
   TFT LCD Displays for Notebook ComputersVnE嘉泰姆
   Automotive DisplaysVnE嘉泰姆
四.下载产品资料PDF文档 VnE嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持VnE嘉泰姆

 QQ截图20160419174301.jpgVnE嘉泰姆

五,产品封装图 (Package)VnE嘉泰姆


blob.pngVnE嘉泰姆
blob.pngPin Function DescriptionVnE嘉泰姆

PinVnE嘉泰姆

NameVnE嘉泰姆

Function DescriptionVnE嘉泰姆

CXSU63137VnE嘉泰姆

CXSU63137-1VnE嘉泰姆

CXSU63137-2VnE嘉泰姆

1VnE嘉泰姆

SRCVnE嘉泰姆

SRCVnE嘉泰姆

SRCVnE嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassVnE嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.VnE嘉泰姆

2VnE嘉泰姆

REFVnE嘉泰姆

REFVnE嘉泰姆

REFVnE嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofVnE嘉泰姆
0.22μFcapacitor closed to the pins.VnE嘉泰姆

3VnE嘉泰姆

AGNDVnE嘉泰姆

AGNDVnE嘉泰姆

AGNDVnE嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect toVnE嘉泰姆
power ground (PGND) underneath the IC.VnE嘉泰姆

4VnE嘉泰姆

PGNDVnE嘉泰姆

PGNDVnE嘉泰姆

PGNDVnE嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upVnE嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputVnE嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundVnE嘉泰姆
(AGND) underneath the IC.VnE嘉泰姆

5VnE嘉泰姆

OUT1VnE嘉泰姆

OUT1VnE嘉泰姆

OUT1VnE嘉泰姆

Output of Operational-Amplifier 1VnE嘉泰姆

6VnE嘉泰姆

NEG1VnE嘉泰姆

NEG1VnE嘉泰姆

NEG1VnE嘉泰姆

Inverting Input of Operational-Amplifier 1VnE嘉泰姆

7VnE嘉泰姆

POS1VnE嘉泰姆

POS1VnE嘉泰姆

POS1VnE嘉泰姆

Non-inverting Input of Operational-Amplifier 1VnE嘉泰姆

8VnE嘉泰姆

NCVnE嘉泰姆

OUT2VnE嘉泰姆

OUT2VnE嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalVnE嘉泰姆
connected of CXSU63137.VnE嘉泰姆

9VnE嘉泰姆

NCVnE嘉泰姆

NEG2VnE嘉泰姆

NEG2VnE嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalVnE嘉泰姆
connected of CXSU63137.VnE嘉泰姆

10VnE嘉泰姆

ICVnE嘉泰姆

POS2VnE嘉泰姆

POS2VnE嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternalVnE嘉泰姆
connected to GND of CXSU63137VnE嘉泰姆

11VnE嘉泰姆

BGNDVnE嘉泰姆

BGNDVnE嘉泰姆

BGNDVnE嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)VnE嘉泰姆
underneath the IC.VnE嘉泰姆

12VnE嘉泰姆

NCVnE嘉泰姆

NCVnE嘉泰姆

POS3VnE嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internalVnE嘉泰姆
connected of CXSU63137/CXSU63137.VnE嘉泰姆

13VnE嘉泰姆

NCVnE嘉泰姆

NCVnE嘉泰姆

OUT3VnE嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.VnE嘉泰姆

14VnE嘉泰姆

SUPVnE嘉泰姆

SUPVnE嘉泰姆

SUPVnE嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassVnE嘉泰姆
SUP to BGND with a 0.1μF capacitor.VnE嘉泰姆

15VnE嘉泰姆

NCVnE嘉泰姆

POS3VnE嘉泰姆

POS4VnE嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingVnE嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.VnE嘉泰姆

16VnE嘉泰姆

NCVnE嘉泰姆

NEG3VnE嘉泰姆

NEG4VnE嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofVnE嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.VnE嘉泰姆

17VnE嘉泰姆

NCVnE嘉泰姆

OUT3VnE嘉泰姆

OUT4VnE嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofVnE嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.VnE嘉泰姆

18VnE嘉泰姆

ICVnE嘉泰姆

ICVnE嘉泰姆

POS5VnE嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedVnE嘉泰姆
to GND of CXSU63137/CXSU63137.VnE嘉泰姆

19VnE嘉泰姆

NCVnE嘉泰姆

NCVnE嘉泰姆

NEG5VnE嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedVnE嘉泰姆
of CXSU63137/CXSU63137.VnE嘉泰姆

20VnE嘉泰姆

NCVnE嘉泰姆

NCVnE嘉泰姆

OUT5VnE嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.VnE嘉泰姆

21VnE嘉泰姆

LXVnE嘉泰姆

LXVnE嘉泰姆

LXVnE嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductorVnE嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.VnE嘉泰姆

22VnE嘉泰姆

INVnE嘉泰姆

INVnE嘉泰姆

INVnE嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangeVnE嘉泰姆
from 2.6V to 6.5V.VnE嘉泰姆

23VnE嘉泰姆

FBVnE嘉泰姆

FBVnE嘉泰姆

FBVnE嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromVnE嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinVnE嘉泰姆
5mm of FB.VnE嘉泰姆

24VnE嘉泰姆

COMPVnE嘉泰姆

COMPVnE嘉泰姆

COMPVnE嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCVnE嘉泰姆
from COMP to AGND.VnE嘉泰姆

PinFunction DescriptionVnE嘉泰姆

PinVnE嘉泰姆

NameVnE嘉泰姆

Function DescriptionVnE嘉泰姆

CXSU63137VnE嘉泰姆

CXSU63137-1VnE嘉泰姆

CXSU63137-2VnE嘉泰姆

24VnE嘉泰姆

COMPVnE嘉泰姆

COMPVnE嘉泰姆

COMPVnE嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCVnE嘉泰姆
from COMP to AGND.VnE嘉泰姆

25VnE嘉泰姆

FBPVnE嘉泰姆

FBPVnE嘉泰姆

FBPVnE嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of aVnE嘉泰姆
resistive voltage-divider between the regulator output and AGND to set theVnE嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-dividerVnE嘉泰姆
close to the pin.VnE嘉泰姆

26VnE嘉泰姆

DRVPVnE嘉泰姆

DRVPVnE嘉泰姆

DRVPVnE嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channelVnE嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.VnE嘉泰姆

27VnE嘉泰姆

FBNVnE嘉泰姆

FBNVnE嘉泰姆

FBNVnE嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of aVnE嘉泰姆
resistive voltage-divider between the regulator output and REF to set theVnE嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-dividerVnE嘉泰姆
close to the pin.VnE嘉泰姆

28VnE嘉泰姆

DRVNVnE嘉泰姆

DRVNVnE嘉泰姆

DRVNVnE嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channelVnE嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.VnE嘉泰姆

29VnE嘉泰姆

DELVnE嘉泰姆

DELVnE嘉泰姆

DELVnE嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND toVnE嘉泰姆
set the high-voltage switch startup delay.VnE嘉泰姆

30VnE嘉泰姆

CTLVnE嘉泰姆

CTLVnE嘉泰姆

CTLVnE嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchVnE嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andVnE嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCVnE嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isVnE嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thanVnE嘉泰姆
1.25V.VnE嘉泰姆

31VnE嘉泰姆

DRNVnE嘉泰姆

DRNVnE嘉泰姆

DRNVnE嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channelVnE嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedVnE嘉泰姆
VSRC.VnE嘉泰姆

32VnE嘉泰姆

COMVnE嘉泰姆

COMVnE嘉泰姆

COMVnE嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow theVnE嘉泰姆
voltage on COM to exceed VSRC.VnE嘉泰姆

六.电路原理图VnE嘉泰姆
七,功能概述VnE嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:VnE嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.VnE嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.VnE嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.VnE嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.VnE嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.VnE嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.VnE嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upVnE嘉泰姆
八,相关产品VnE嘉泰姆

Switching Regulator > Boost ConverterVnE嘉泰姆

 Part_No VnE嘉泰姆

PackageVnE嘉泰姆

Archi-tecture VnE嘉泰姆

Input VnE嘉泰姆

Voltage    VnE嘉泰姆

Max Adj.VnE嘉泰姆

Output VnE嘉泰姆

Voltage VnE嘉泰姆

Switch Current Limit (max) VnE嘉泰姆

Fixed VnE嘉泰姆

Output VnE嘉泰姆

Voltage  VnE嘉泰姆

Switching VnE嘉泰姆

Frequency VnE嘉泰姆

Internal Power   Switch VnE嘉泰姆

Sync. Rectifier VnE嘉泰姆

 

minVnE嘉泰姆

maxVnE嘉泰姆

minVnE嘉泰姆

maxVnE嘉泰姆

(A)VnE嘉泰姆

(V)VnE嘉泰姆

(kHz)VnE嘉泰姆

 

CXSU63133VnE嘉泰姆

SOT89VnE嘉泰姆

VM VnE嘉泰姆

0.9VnE嘉泰姆

5.5VnE嘉泰姆

2.5VnE嘉泰姆

5.5VnE嘉泰姆

0.5VnE嘉泰姆

1.8|2.6|2.8|3VnE嘉泰姆

|3.3|3.8|4.5|5VnE嘉泰姆

-VnE嘉泰姆

NoVnE嘉泰姆

YesVnE嘉泰姆

CXSU63134VnE嘉泰姆

MSOP8|TSSOP8VnE嘉泰姆

|SOP8VnE嘉泰姆

VMVnE嘉泰姆

2.5VnE嘉泰姆

5.5VnE嘉泰姆

2.5VnE嘉泰姆

-VnE嘉泰姆

-VnE嘉泰姆

-VnE嘉泰姆

200 ~ 1000VnE嘉泰姆

NoVnE嘉泰姆

NoVnE嘉泰姆

CXSU63135VnE嘉泰姆

TSSOP8|SOP-8PVnE嘉泰姆

VMVnE嘉泰姆

1VnE嘉泰姆

5.5VnE嘉泰姆

2.5VnE嘉泰姆

5VnE嘉泰姆

1VnE嘉泰姆

2.5|3.3VnE嘉泰姆

300VnE嘉泰姆

YesVnE嘉泰姆

YesVnE嘉泰姆

CXSU63136VnE嘉泰姆

SOP8VnE嘉泰姆

CMVnE嘉泰姆

3VnE嘉泰姆

40VnE嘉泰姆

1.25VnE嘉泰姆

40VnE嘉泰姆

1.5VnE嘉泰姆

-VnE嘉泰姆

33 ~ 100VnE嘉泰姆

YesVnE嘉泰姆

NoVnE嘉泰姆

CXSU63137VnE嘉泰姆

TQFN5x5-32VnE嘉泰姆

CMVnE嘉泰姆

2.5VnE嘉泰姆

6.5VnE嘉泰姆

2.5VnE嘉泰姆

18VnE嘉泰姆

3VnE嘉泰姆

NoVnE嘉泰姆

1200VnE嘉泰姆

YesVnE嘉泰姆

NoVnE嘉泰姆

CXSU63138VnE嘉泰姆

TSOT23-5VnE嘉泰姆

TDFN2x2-6VnE嘉泰姆

CMVnE嘉泰姆

2.5VnE嘉泰姆

6VnE嘉泰姆

2.5VnE嘉泰姆

20VnE嘉泰姆

2VnE嘉泰姆

-VnE嘉泰姆

1500VnE嘉泰姆

YesVnE嘉泰姆

NoVnE嘉泰姆

CXSU63139VnE嘉泰姆

TQFN4x4-6VnE嘉泰姆

TDFN3x3-12VnE嘉泰姆

CMVnE嘉泰姆

1.8VnE嘉泰姆

5.5VnE嘉泰姆

2.7VnE嘉泰姆

5.5VnE嘉泰姆

5VnE嘉泰姆

-VnE嘉泰姆

1.2VnE嘉泰姆

YesVnE嘉泰姆

YesVnE嘉泰姆

CXSU63140VnE嘉泰姆

SOT23-5VnE嘉泰姆

CMVnE嘉泰姆

2.5VnE嘉泰姆

6VnE嘉泰姆

2.5VnE嘉泰姆

32VnE嘉泰姆

1VnE嘉泰姆

-VnE嘉泰姆

1000VnE嘉泰姆

YesVnE嘉泰姆

NoVnE嘉泰姆

CXSU63141VnE嘉泰姆

TSOT-23-6 VnE嘉泰姆

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